Commit graph

152335 commits

Author SHA1 Message Date
Konstantin Seurer
0821f76fd7 radv: Move dispatch table init into a separate function
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20439>
2023-01-02 14:39:23 +00:00
Konstantin Seurer
b0e55c4d60 vulkan: Allow passing NULL dispatch tables to vk_device_init
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20439>
2023-01-02 14:39:23 +00:00
Gert Wollny
8ad6b10a01 r600: Don't merge alu groups with variable length dot using t-slot
Since the variable length dot must stay in its slot configuration
do not try to merge the group with the previous group when an op may be
moved to the t slot, because this may lead to breaking the multi-slot
operation.

Fixes:  357e5fac99
   r600/sfn: Use variable length DOT on Evergreen and Cayman

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20451>
2023-01-02 14:31:35 +00:00
Gert Wollny
9fd9f3cd10 r600/sfn: Set minimum required registers based on array allocation
In the rare case that after register allocation the highest directly
accessed register index is below the highest value used for an
indirectly accessed array we have to ensure that the shader allocates
enough registers to account for these indices that are not seen by the
assembler.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7966
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20451>
2023-01-02 14:31:35 +00:00
Gert Wollny
8348c9c84d r600: enable ARB_gl_spirv
76 out of 86 piglits pass.
Some fail because SSBOs are only supported for FS and CS on r600, but
the piglits try to use SSBOs with VS, and there are piglits that try to
bind SSBO at 8, and only 0-7 is supported as binding point.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20451>
2023-01-02 14:31:35 +00:00
Gert Wollny
0ff00cfe97 r600: Fix early exit when setting SSBOs
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20451>
2023-01-02 14:31:35 +00:00
Gert Wollny
ff4de13c70 r600/sfn: Fix FS primid input slot
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20451>
2023-01-02 14:31:35 +00:00
Gert Wollny
c69f2fe5fd r600/sfn: Fix warning for mixed use of enum and integer
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20451>
2023-01-02 14:31:35 +00:00
Gert Wollny
2df023a1f1 r600/sfn: pre-evaluate allowed dest mask in Alu instructions
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20451>
2023-01-02 14:31:35 +00:00
Gert Wollny
e2eb7cd3d8 r600/sfn: move handling of legacy math rules to assembler
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20451>
2023-01-02 14:31:35 +00:00
Erico Nunes
46a493a2f0 st/mesa: Fix free of non-shareable shaders on context destroy
On drivers that do not set PIPE_CAP_SHAREABLE_SHADERS,
st_destroy_program_variants() may reach st_save_zombie_shader()
which accesses st->zombie_shaders.mutex.
Destroying st->zombie_shaders.mutex before destroying program variants
may result in an invalid access in a multiple context scenario for
those drivers.
Move the mutex destroy call to after program variants destroy so that
it doesn't hit a deadlock on context destroy.

Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20458>
2023-01-02 13:50:52 +00:00
Rhys Perry
1174ab6d56 ac/llvm: use amdgpu-color-export/amdgpu-depth-export
These are necessary to use the correct export target on GFX11:
https://reviews.llvm.org/D128185

Fixes artifacts on Lara in Rise of the Tomb Raider benchmark and hair in
The Witcher 3 (classic).

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20357>
2023-01-02 12:00:04 +00:00
Timur Kristóf
d496f0b97d radv: Decouple radv_before_taskmesh_draw from radv_before_draw.
radv_before_taskmesh_draw will no longer call radv_before_draw and
instead implement the necessary functionality on its own.

radv_before_draw will no longer have to emit mesh shader descriptors.

As a result, both functions should have a lower CPU overhead now.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18829>
2023-01-02 12:24:42 +01:00
Samuel Pitoiset
050c39c92f radv: fix missing initialization of radv_resolve_barrier::dst_stage_mask
Otherwise, this value is unitialized when read in
radv_ace_internal_barrier().

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7909
Fixes: 4c6f83006d ("radv: Synchronization for task shaders.")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20351>
2023-01-02 08:04:29 +01:00
Marek Olšák
fc0e23b6dd iris: implement PIPE_CAP_MAP_UNSYNCHRONIZED_THREAD_SAFE
required by glthread

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20379>
2023-01-01 16:00:07 -05:00
Marek Olšák
b9caddb4a7 glthread,gallium: add a CAP to disable glBufferSubData optimization in glthread
it regresses performance on iris

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20379>
2023-01-01 16:00:07 -05:00
Daniel Schürmann
83b31b11a5 aco: Reassign dead definitions of p_split_vector to associated register
Any unused split_vector definition can always use the same register
as the operand. This avoids creating unnecessary copies.

Fossil DB stats on Rembrandt (RDNA2):
Totals from 3904 (2.89% of 134906) affected shaders:
CodeSize: 18326692 -> 18271688 (-0.30%)
Instrs: 3386632 -> 3372888 (-0.41%)
Latency: 42337481 -> 42330085 (-0.02%); split: -0.02%, +0.00%
InvThroughput: 6566731 -> 6566424 (-0.00%); split: -0.01%, +0.00%
Copies: 224301 -> 210559 (-6.13%)

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16161>
2023-01-01 15:04:07 +01:00
Timur Kristóf
75b1027722 aco: Try to reassign split vector registers post-RA.
Eliminate unnecessary copies when the operand registers of a
p_split_vector instruction are not clobbered between the p_split_vector
and the user of its definitions.

This happens when p_split_vector doesn't kill its operand and its
definitions have a shorter lifespan that the operand. It affects every
NGG culling shader among other things.

This optimization exists because it's too difficult to solve it
in RA, and should be removed after we solved this in RA.

v2 by Daniel Schürmann:
- Rearrange and simplify conditions for the new optimization
- Fix a few bugs

v3 by Daniel Schürmann:
- Check number of encoded ALU operands

Fossil DB stats on Rembrandt (RDNA2):
Totals from 64896 (48.10% of 134906) affected shaders:
CodeSize: 175693348 -> 175434944 (-0.15%)
Instrs: 33333912 -> 33269388 (-0.19%)
Latency: 183766084 -> 183763432 (-0.00%); split: -0.00%, +0.00%
InvThroughput: 28589651 -> 28589340 (-0.00%); split: -0.00%, +0.00%
Copies: 2806550 -> 2742038 (-2.30%)

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16161>
2023-01-01 15:04:07 +01:00
Timur Kristóf
3d29779a25 aco/optimizer_postRA: Distinguish overwritten untrackable and subdword.
This allows is_overwritten_since to return false when the last
writer instruction of a register can't be tracked but we know it wasn't
written in the current block.

Fossil DB stats on Rembrandt (RDNA2):
Totals from 1163 (0.86% of 134906) affected shaders:
CodeSize: 9815920 -> 9805016 (-0.11%)
Instrs: 1843688 -> 1840962 (-0.15%)
Latency: 19219153 -> 19209171 (-0.05%)
InvThroughput: 3354375 -> 3353852 (-0.02%)

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16161>
2023-01-01 15:04:07 +01:00
Daniel Schürmann
d3b0f78110 aco/optimizer_postRA: Initialize loop header with preheader information
This works because of SSA and should be safer than just setting 'not_written_yet'.

No Fossil DB changes on Rembrandt (RDNA2).

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16161>
2023-01-01 15:03:57 +01:00
Daniel Schürmann
8f4eccb138 aco: fix reset_block_regs() in postRA-optimizer
Accidentally, we picked the index of the predecessors instead of the predecessors.

Totals from 8496 (6.30% of 134913) affected shaders: (GFX10.3)
CodeSize: 64070724 -> 64022516 (-0.08%); split: -0.08%, +0.00%
Instrs: 11932750 -> 11920698 (-0.10%); split: -0.10%, +0.00%
Latency: 144040266 -> 144017062 (-0.02%); split: -0.02%, +0.00%
InvThroughput: 29327735 -> 29326421 (-0.00%); split: -0.00%, +0.00%

Fossil DB stats on Rembrandt (RDNA2):
Totals from 4488 (3.33% of 134906) affected shaders:
CodeSize: 42759736 -> 42735392 (-0.06%); split: -0.06%, +0.00%
Instrs: 7960522 -> 7954436 (-0.08%); split: -0.08%, +0.00%
Latency: 96192647 -> 96172571 (-0.02%); split: -0.02%, +0.00%
InvThroughput: 19313576 -> 19312575 (-0.01%); split: -0.01%, +0.00%

Fixes: 75967a4814 ('aco/optimizer_postRA: Speed up reset_block() with predecessors.')
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16161>
2023-01-01 15:03:51 +01:00
Gert Wollny
b2dc63ed8c aux/trace: Add pipe_context::set_hw_atomic_buffers
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20453>
2023-01-01 13:18:54 +00:00
Konstantin Seurer
37cb882883 radv: Advertise rt pipelines for DOOM Eternal
The game has been fixed recently.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20464>
2022-12-31 20:24:54 +00:00
Konstantin Seurer
4125a35c9c radv: Advertise rt pipelines for Quake II RTX
The game has been working for a while now.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20464>
2022-12-31 20:24:54 +00:00
Konstantin Seurer
ea38efb17e radv: Add a driconf to advertise rt pipelines
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20464>
2022-12-31 20:24:54 +00:00
Christian Gmeiner
9e56f69edf isaspec: encode: handle special fieldname properties
Without this change a fieldname like '{DST::align=12}' was not used for
encoding. Change the regex to include such fieldnames and remove the fieldname
property in a later step.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20462>
2022-12-31 13:43:15 +00:00
Jordan Justen
4429bdd7f5 drm-shim: Use hide_drm_device_path() to hide other drm devices
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19241>
2022-12-30 15:51:11 -08:00
Jordan Justen
b39044fd9f drm-shim: Add hide_drm_device_path()
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19241>
2022-12-30 15:51:07 -08:00
Jordan Justen
d7ed05d1ba drm-shim: Convert nfasprintf and nfvasprintf to functions
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19241>
2022-12-30 15:50:36 -08:00
Rob Clark
c9a4c0f22a freedreno/a6xx: Linewrap
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20465>
2022-12-30 10:41:55 -08:00
Rob Clark
d75a1bb4d0 freedreno: Fix use_fence_fd typo
This was causing excessive flushes, because requesting an out-fence fd
triggers the drm layer to flush deferred submits instead of continued
merging.

Fixes: 48b5164356 ("freedreno/drm: Return fence from submit flush")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20465>
2022-12-30 10:41:55 -08:00
Rob Clark
92e6fea7df freedreno/drm: Flush deferred submits at context teardown
If we don't flush deferred submits, we could end up waiting on a fence
that is never signaled.

Fixes: 48b5164356 ("freedreno/drm: Return fence from submit flush")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20465>
2022-12-30 10:41:55 -08:00
Rob Clark
4441a41629 freedreno: Add some more traces
Add some more traces around fence waits to better see potential stalls.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20465>
2022-12-30 08:42:10 -08:00
Rob Clark
89286632a2 freedreno: Remove some impossible NULL checks
There is only one special case (a3xx/a4xx queries) were a pipe_resource
is allocated without a backing buffer (because we don't know the needed
size until we know the # of bins).  But those will never end up as an
a6xx render target!

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20465>
2022-12-30 08:42:02 -08:00
Rob Clark
75eb0d2891 freedreno/ir3: Allow isam for non-bindless ssbo loads
We already had the infrastructure for this, dating back to a5xx, so this
is low hanging fruit to hit the faster isam path.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20429>
2022-12-29 17:42:42 +00:00
David Heidelberg
7cf7bf8b9e ci/broadcom: add rpi3 flake color_clears.multi_context.gles2.rgba8888_pbuffer
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20452>
2022-12-29 17:21:38 +00:00
José Roberto de Souza
def474e916 intel/genxml/gen12.5: Pipe_Control::Remove Global Snapshot Count Reset
It was not meant to be used(Iris have assert for it) and it was
removed from Pipe_Control instruction in gen12.5 and newer.

BSpec: 47112
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20444>
2022-12-29 08:34:25 -08:00
José Roberto de Souza
c6d1f76da2 anv: Add and use emit_pipeline_select()
To avoid the replication of code to properly emit PIPELINE_SELECT.

init_compute_queue_state() had a different emit of PIPELINE_SELECT but
as there is no compute engine in GFX VER 11 we are safe with the
differences.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20444>
2022-12-29 08:34:15 -08:00
David Heidelberg
57f73d097e ci/iris: add iris-kbl flake
Ref: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7547

Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20448>
2022-12-28 23:08:37 +00:00
Aleksey Komarov
dcae301828 pan/va: Fix MUX.i32 and MUX.v2i16 description. Should be:
`(A &amp; mask) | (B &amp; ~mask)`

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20441>
2022-12-28 21:36:54 +00:00
Aleksey Komarov
d14d7c49db pan/va: Fix d0 description in enum "Load lane (8-bit)"
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20441>
2022-12-28 21:36:54 +00:00
Aleksey Komarov
f102b57423 pan/va: Fix description for constant 0xFAFCFDFE: -2, -3, -4, -6
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20441>
2022-12-28 21:36:54 +00:00
David Heidelberg
db9cd8b5da ci/amd: decrease number of stoney runners
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20443>
2022-12-28 19:30:55 +01:00
Patrick Lerda
2b2824b9ea util/xmlconfig: fix memory leak triggered by duplicates
This change copies the string once.

Direct leak of 196 byte(s) in 14 object(s) allocated from:
    #0 0x7f71598ec7a7 in strdup (/usr/lib64/libasan.so.6+0x5c7a7)
    #1 0x7f70a56ff942 in driParseOptionInfo ../src/util/xmlconfig.c:357
    #2 0x7f70a56f0565 in pipe_loader_load_options ../src/gallium/auxiliary/pipe-loader/pipe_loader.c:126
    #3 0x7f70a56f0565 in pipe_loader_create_screen_vk ../src/gallium/auxiliary/pipe-loader/pipe_loader.c:167

Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20026>
2022-12-28 14:06:49 +00:00
Alyssa Rosenzweig
f603d8ce9e asahi: Clang-format the subtree
See 0afd691f29 ("panfrost: clang-format the tree") for why I'm doing this.
Asahi already mostly follows Mesa style so this doesn't do much. But this means
we can all stop thinking about formatting and trust the robot poets to do that
for us.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20434>
2022-12-27 22:46:29 +00:00
Alyssa Rosenzweig
bf93fd46e2 asahi: Clang-format the twiddled tests
There are no outstanding commits to these files in any branch, so they don't
need to be considered for the rebasing script. That said, they are massive and
bottleneck the rebasing script, so we'll want to split them out to keep rebasing
efficient.

(Nominally I should make the rebasing script less stupid but with these files
ignored it works pretty well.)

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20434>
2022-12-27 22:46:29 +00:00
Alyssa Rosenzweig
c4c4f0502b asahi: Add missing #include's
Otherwise we won't build after clang-format shuffles headers.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20434>
2022-12-27 22:46:29 +00:00
Alyssa Rosenzweig
d9dc77f068 asahi: Add some clang-format commas
Otherwise clang-format will mangle this.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20434>
2022-12-27 22:46:29 +00:00
Alyssa Rosenzweig
c1f175c9fa asahi: Manually format some parts of the code
clang-format will mangle these.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20434>
2022-12-27 22:46:29 +00:00
Alyssa Rosenzweig
de0fcd08d3 asahi: Add .clang-format file
Derived from the Freedreno/Panfrost file, with foreach macros updated.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20434>
2022-12-27 22:46:29 +00:00