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Author SHA1 Message Date
Martin Roukala (né Peres)
078020c45e ci: introduce the VALVE_FARM variable 
This mirrors all the other *_FARM variables, and allows developers to
quickly disable all the jobs that would otherwise run on Valve's CI
infrastructure by setting it to the 'offline' value.

To this end, .radv_rules gets split into .radv-collabora-rules and
.radv-valve-rules, since the driver will be testable in two different
test farms. Every radv job is then made to inherit from the right farm.

Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19556>
 2022-11-10 13:22:33 +00:00
Martin Roukala (né Peres)
bedbdb5554 ci/b2c-test: remove a noisy 'ls -l' 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19556>
 2022-11-10 13:22:33 +00:00
Martin Roukala (né Peres)
a06d3c2d2c ci/b2c-test: update the trigger container to the latest version 
This shouldn't affect anything, except some extra debug information
and some reliability improvements.

Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19556>
 2022-11-10 13:22:33 +00:00
Lionel Landwerlin
b499a27d74 nir: make ray query load values visible in NIR prints 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19641>
 2022-11-10 14:40:08 +02:00
Sarah Walker
525c1dd95b pvr: Fix segfault in pvr_CreatePipelineLayout when layout has zero bindings 
Signed-off-by: Sarah Walker <sarah.walker@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19407>
 2022-11-10 12:04:57 +00:00
Jason Ekstrand
4d63beaae6 hasvk: Switch to common code for command buffer lifecycles 
This gets us command buffer object recycling.

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18383>
 2022-11-10 11:15:23 +00:00
Jason Ekstrand
415bf88637 anv: Switch to common code for command buffer lifecycles 
This gets us command buffer object recycling.

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18383>
 2022-11-10 11:15:23 +00:00
Karol Herbst
89b49d479c rusticl: make image format/order work on radeonsi 
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19381>
 2022-11-10 10:21:34 +00:00
Karol Herbst
0cd23a6ae2 rusticl: skip lowering image/sampler derefs if drivers tells so 
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19381>
 2022-11-10 10:21:34 +00:00
Karol Herbst
d459a58473 nir/lower_cl_images: support keeping derefs 
This is needed by radeonsi and zink

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19381>
 2022-11-10 10:21:34 +00:00
Karol Herbst
eae281e788 rusticl/kernel: use binding for filling image channel data and order 
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19381>
 2022-11-10 10:21:34 +00:00
Karol Herbst
b44bf80ee6 rusticl: use texture vars for readonly images 
This is needed by zink

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19381>
 2022-11-10 10:21:34 +00:00
Karol Herbst
10144c1f0b rusticl: do not DCE any samplers or textures 
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19381>
 2022-11-10 10:21:34 +00:00
Karol Herbst
f8dd64739e radeonsi: do not DCE texture vars 
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19381>
 2022-11-10 10:21:34 +00:00
Karol Herbst
761a2819b5 nir: properly handle CL textures 
Without this tex operations would reference images as the texture, which
doesn't really makes much sense. So move to a model closer to Vulkan by
using discrete texture and sampler variables instead.

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19381>
 2022-11-10 10:21:34 +00:00
Karol Herbst
915403ea6c nir/gather_info: take texture vars into account when counting textures 
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19381>
 2022-11-10 10:21:34 +00:00
Karol Herbst
829d6487c0 glsl: add texture subpass variants 
Dzn needs those as it lowers images to textures and we want to be more
consistent about texture ops using texture vars instead of images.

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19381>
 2022-11-10 10:21:34 +00:00
Karol Herbst
87526f79db glsl: fix buffer texture type 
Fixes: 3ace6b968b ("compiler/types: Add a texture type")
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19381>
 2022-11-10 10:21:34 +00:00
Samuel Pitoiset
d2563e6600 ac/nir: do not convert GS outputs to the expected variable size on GFX11 
Outputs are always considered 32-bits.
Found by inspection.

Cc: 22.3 mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19612>
 2022-11-10 07:30:08 +00:00
Yonggang Luo
26a6d16db0 zink: Only #include <vulkan/vulkan_core.h> instead #include <vulkan/vulkan.h> in kopper_interface.h 
It's pulled too much system dependent headers before this commit
when #include <vulkan/vulkan.h> directly,

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19491>
 2022-11-10 06:59:42 +00:00
Yonggang Luo
5425e05f2f zink: struct kopper_surface is not accessed, remove it in kopper_interface.h 
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19491>
 2022-11-10 06:59:42 +00:00
Yonggang Luo
4c409b921b zink: Indent with 3 space in zink/zink_kopper.c 
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19491>
 2022-11-10 06:59:42 +00:00
Yonggang Luo
4b337638bb wgl: Trim trailing spaces in stw_st.c 
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19491>
 2022-11-10 06:59:42 +00:00
Yonggang Luo
0b82281e3e util: Use include_directories('..') instead include_directories('.') for inc_util 
So include util headers are always using util/ prefix in mesa code base
And prevent including files under src/util without util/ prefix

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19546>
 2022-11-10 06:27:25 +00:00
Yonggang Luo
e399dc3544 util: normalize include files under src/util/*.h with util/ prefix in mesa code base 
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: Jesse Natalie <jenatali@microsoft.com>
Acked-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19546>
 2022-11-10 06:27:25 +00:00
Yonggang Luo
beea3548ce util: Move texcompress template files into util/format 
Because these files are accessed in  util/format/u_format_*.c
To make sure util are self contained we need move these files

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19547>
 2022-11-10 05:35:41 +00:00
Yonggang Luo
0c12a39682 mesa: include <util/*.h> instead macros.h in texcompress_bptc_tmp.h 
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19547>
 2022-11-10 05:35:41 +00:00
Yonggang Luo
f6ed016fe9 util: Replace the usage of ALIGN16 with alignas(16) and them remove ALIGN16 macro 
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19565>
 2022-11-10 05:04:12 +00:00
Yonggang Luo
956935abaf vulkan: Replace _Alignas with alignas 
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19565>
 2022-11-10 05:04:12 +00:00
Yonggang Luo
38b2402b5f meson: Use deps_for_libmesa_util for idep_mesautil instead hand crafted list 
Now the idep_mesautilc11 have no need reference when idep_mesautil is referenced

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Dylan Baker <dylan.c.baker@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19526>
 2022-11-10 11:57:22 +08:00
Yonggang Luo
4d1a293e73 meson: Indent util/meson.build with 2 space 
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Dylan Baker <dylan.c.baker@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19526>
 2022-11-10 11:57:19 +08:00
Alyssa Rosenzweig
35a531fcd4 agx: Don't assert on texop twice 
This is already asserted for lod modes.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19590>
 2022-11-10 02:25:09 +00:00
Alyssa Rosenzweig
ededb108d9 agx: Implement unary math ops 
Implement nir_op_bitfield_reverse, nir_op_bit_count, and
nir_op_ufind_msb. These map to native instructions.  With appropriate
integer render target and multiple render target support, passes:

   dEQP-GLES31.functional.shaders.builtin_functions.integer.bitfieldreverse.*vertex
   dEQP-GLES31.functional.shaders.builtin_functions.integer.bitfieldreverse.*fragment
   dEQP-GLES31.functional.shaders.builtin_functions.integer.bitcount.*vertex
   dEQP-GLES31.functional.shaders.builtin_functions.integer.bitcount.*fragment
   dEQP-GLES31.functional.shaders.builtin_functions.integer.findLSB.*vertex
   dEQP-GLES31.functional.shaders.builtin_functions.integer.findLSB.*fragment
   dEQP-GLES31.functional.shaders.builtin_functions.integer.findMSB.*vertex
   dEQP-GLES31.functional.shaders.builtin_functions.integer.findMSB.*fragment

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19590>
 2022-11-10 02:25:09 +00:00
Alyssa Rosenzweig
44ccdca768 agx: Implement {i,u}mul_2x32_64 
With support for MRT in the driver (not included here), passes:

   dEQP-GLES31.functional.shaders.builtin_functions.integer.imulextended.int_highp_fragment
   dEQP-GLES31.functional.shaders.builtin_functions.integer.umulextended.int_highp_fragment

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19590>
 2022-11-10 02:25:09 +00:00
Alyssa Rosenzweig
74a884f73c agx: Implement nir_op_unpack_64_2x32_split_{x,y} 
Used in the umul_extended lowering.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19590>
 2022-11-10 02:25:09 +00:00
Alyssa Rosenzweig
ea88ebefb9 agx/ra: Remove index_to_reg 
Use stronger asserts instead.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19590>
 2022-11-10 02:25:09 +00:00
Alyssa Rosenzweig
dea00bcc8f agx: Add CSE optimization pass 
Ported from the Bifrost compiler, in turn based on the ir3 one. This
cleans up a lot of junk we emit during NIR->AGX and will help with some
SSA RA troubles.

total instructions in shared programs: 34803 -> 34381 (-1.21%)
instructions in affected programs: 18652 -> 18230 (-2.26%)
helped: 198
HURT: 0
helped stats (abs) min: 1.0 max: 28.0 x̄: 2.13 x̃: 1
helped stats (rel) min: 0.31% max: 12.50% x̄: 3.94% x̃: 2.78%
95% mean confidence interval for instructions value: -2.45 -1.81
95% mean confidence interval for instructions %-change: -4.40% -3.48%
Instructions are helped.

total bytes in shared programs: 238094 -> 234824 (-1.37%)
bytes in affected programs: 126472 -> 123202 (-2.59%)
helped: 200
HURT: 0
helped stats (abs) min: 6.0 max: 168.0 x̄: 16.35 x̃: 8
helped stats (rel) min: 0.37% max: 17.65% x̄: 4.25% x̃: 3.38%
95% mean confidence interval for bytes value: -18.49 -14.21
95% mean confidence interval for bytes %-change: -4.67% -3.84%
Bytes are helped.

total halfregs in shared programs: 10078 -> 10107 (0.29%)
halfregs in affected programs: 565 -> 594 (5.13%)
helped: 22
HURT: 22
helped stats (abs) min: 1.0 max: 4.0 x̄: 1.23 x̃: 1
helped stats (rel) min: 5.71% max: 25.00% x̄: 23.38% x̃: 25.00%
HURT stats (abs)   min: 2.0 max: 4.0 x̄: 2.55 x̃: 2
HURT stats (rel)   min: 4.44% max: 30.77% x̄: 15.61% x̃: 12.73%
95% mean confidence interval for halfregs value: 0.03 1.28
95% mean confidence interval for halfregs %-change: -10.17% 2.40%
Inconclusive result (%-change mean confidence interval includes 0).

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19590>
 2022-11-10 02:25:09 +00:00
Alyssa Rosenzweig
4387d0886d agx: Describe whether instructions may be reordered 
As per NIR, for the benefit of CSE. It is assumed that instructions that
cannot be eliminated also cannot be reordered.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19590>
 2022-11-10 02:25:09 +00:00
Alyssa Rosenzweig
27869f6966 agx: Add and use replace_src helper 
From Bifrost.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19590>
 2022-11-10 02:25:09 +00:00
Alyssa Rosenzweig
adf3cbc04c agx: Use nir_opt_phi_precision 
No shader-db changes, but helped a custom shader I wrote to test loops.
My shader-db is too small.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19590>
 2022-11-10 02:25:09 +00:00
Alyssa Rosenzweig
98f0ebf264 agx: Pass agx_index to agx_copy 
More straightforward interface and will allow including immediates later
if we want to.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19590>
 2022-11-10 02:25:09 +00:00
Alyssa Rosenzweig
023f27fada agx: Coalesce collects when possible 
Track collects and use them as affinities when choosing registers. On
glmark2:

total instructions in shared programs: 5498 -> 5388 (-2.00%)
instructions in affected programs: 2748 -> 2638 (-4.00%)
helped: 31
HURT: 0
helped stats (abs) min: 1.0 max: 12.0 x̄: 3.55 x̃: 3
helped stats (rel) min: 0.09% max: 57.14% x̄: 10.58% x̃: 5.97%
95% mean confidence interval for instructions value: -4.61 -2.49
95% mean confidence interval for instructions %-change: -15.16% -6.00%
Instructions are helped.

total bytes in shared programs: 37280 -> 36620 (-1.77%)
bytes in affected programs: 18880 -> 18220 (-3.50%)
helped: 31
HURT: 0
helped stats (abs) min: 6.0 max: 72.0 x̄: 21.29 x̃: 18
helped stats (rel) min: 0.07% max: 48.98% x̄: 9.16% x̃: 5.17%
95% mean confidence interval for bytes value: -27.64 -14.94
95% mean confidence interval for bytes %-change: -13.03% -5.29%
Bytes are helped.

total halfregs in shared programs: 1267 -> 1279 (0.95%)
halfregs in affected programs: 37 -> 49 (32.43%)
helped: 0
HURT: 9
HURT stats (abs)   min: 1.0 max: 2.0 x̄: 1.33 x̃: 1
HURT stats (rel)   min: 16.67% max: 66.67% x̄: 35.58% x̃: 28.57%
95% mean confidence interval for halfregs value: 0.95 1.72
95% mean confidence interval for halfregs %-change: 21.50% 49.67%
Halfregs are HURT.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19590>
 2022-11-10 02:25:09 +00:00
Alyssa Rosenzweig
4cc2427ad6 agx: Introduce agx_foreach_ssa_{src,dest} macros 
These are convenient iterators especially in the register allocator.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19590>
 2022-11-10 02:25:09 +00:00
Alyssa Rosenzweig
4971870441 agx/ra: Factor out assign_regs 
Prepare to record bookkeeping needed for live range splits.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19590>
 2022-11-10 02:25:09 +00:00
Alyssa Rosenzweig
2b806b5cf8 agx/ra: Use BITSET_*_RANGE in some places 
A bit neater.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19590>
 2022-11-10 02:25:09 +00:00
Alyssa Rosenzweig
be5357a353 agx: Free dests of splits that are never read 
Otherwise the registers "leak", bloating register pressure by
arbitrarily large amounts. This is easy to handle in DCE by rewriting to
a null destination, though we could use a sideband channel if we didn't
want null destinations in the IR.

glmark2 subset of shader-db is much improved:

total instructions in shared programs: 7324 -> 7313 (-0.15%)
instructions in affected programs: 483 -> 472 (-2.28%)
helped: 5
HURT: 2

total bytes in shared programs: 42788 -> 42722 (-0.15%)
bytes in affected programs: 2808 -> 2742 (-2.35%)
helped: 5
HURT: 2

total halfregs in shared programs: 2421 -> 2058 (-14.99%)
halfregs in affected programs: 1235 -> 872 (-29.39%)
helped: 28
HURT: 0

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19590>
 2022-11-10 02:25:09 +00:00
Alyssa Rosenzweig
9a48c35668 agx: Refuse to handle discontiguous iter 
This will cause problems with register allocation.

instructions HURT:   shaders/glmark/1-24.shader_test MESA_SHADER_FRAGMENT: 135 -> 136 (0.74%)
instructions HURT:   shaders/glmark/1-8.shader_test MESA_SHADER_FRAGMENT: 84 -> 85 (1.19%)

bytes HURT:   shaders/glmark/1-24.shader_test MESA_SHADER_FRAGMENT: 914 -> 922 (0.88%)
bytes HURT:   shaders/glmark/1-8.shader_test MESA_SHADER_FRAGMENT: 574 -> 580 (1.05%)

halfregs helped:   shaders/glmark/1-8.shader_test MESA_SHADER_FRAGMENT: 20 -> 19 (-5.00%)
halfregs helped:   shaders/glmark/1-24.shader_test MESA_SHADER_FRAGMENT: 25 -> 23 (-8.00%)
halfregs helped:   shaders/glmark/7-3.shader_test MESA_SHADER_FRAGMENT: 11 -> 10 (-9.09%)
halfregs helped:   shaders/glmark/4-2.shader_test MESA_SHADER_FRAGMENT: 23 -> 19 (-17.39%)

total instructions in shared programs: 5716 -> 5718 (0.03%)
instructions in affected programs: 219 -> 221 (0.91%)
helped: 0
HURT: 2

total bytes in shared programs: 38118 -> 38132 (0.04%)
bytes in affected programs: 1488 -> 1502 (0.94%)
helped: 0
HURT: 2

total halfregs in shared programs: 1639 -> 1631 (-0.49%)
halfregs in affected programs: 79 -> 71 (-10.13%)
helped: 4
HURT: 0
helped stats (abs) min: 1.0 max: 4.0 x̄: 2.00 x̃: 1
helped stats (rel) min: 5.00% max: 17.39% x̄: 9.87% x̃: 8.55%
95% mean confidence interval for halfregs value: -4.25 0.25
95% mean confidence interval for halfregs %-change: -18.31% -1.43%
Inconclusive result (value mean confidence interval includes 0).

Total CPU time (seconds): 11.41 -> 11.72 (2.72%)

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19590>
 2022-11-10 02:25:09 +00:00
Alyssa Rosenzweig
af2137883c agx: Don't emit writeout 0xC200 
Metal omits this in OpenGL mode, and since we have no clue what it does,
I see no reason for us not to do the same.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19590>
 2022-11-10 02:25:09 +00:00
Timothy Arceri
e295ee778b mesa: fix typo from adding glGetObjectLabelEXT 
Fixes: 	675bcbb7a1 ("mesa: add EXT_debug_label support")

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19607>
 2022-11-10 01:07:45 +00:00
Eric Engestrom
069bdef621 docs: update calendar for 22.3.0-rc2 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19631>
 2022-11-10 01:01:51 +00:00