Commit graph

167 commits

Author SHA1 Message Date
Paulo Zanoni
06b279ccb2 iris: save some iris_syncobj_reference() calls at update_bo_syncobjs()
Save some iris_syncobj_reference() calls at at update_bo_syncobjs() by
refactoring the function, moving the unnecessary calls out of the for
loop. Also improve the documentation and drive-by fix a white space
issue.

Commit a90a1f15a7 incremented IRIS_BATCH_COUNT and adjusted the code
involving it. But the way it was done at update_bo_syncobjs() means
we'll now call iris_syncobj_reference() more than the amount of times
we need. This isn't a problem since in the second call we're moving
the reference from something to the same thing, but still we can get
away with just not doing it, so why not?

There is also the question of whether we should really iterate over
IRIS_BATCH_COUNT or something else (to save time on platforms that
don't have as many batches as IRIS_BATCH_COUNT), but this is a matter
for a separate patch (see MR !14747). In this patch we reorder the
operations a little bit so when the time comes there will be just one
loop to adjust.

I also changed the order so first we look at's in bo_deps and only
later we write to bo_deps. This is more future-proof and will make the
next patch easier to land and understand.

Reference: a90a1f15a7 ("iris: Create an IRIS_BATCH_BLITTER for using the BLT command streamer")
Reference: https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14747
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14505>
2022-02-01 00:34:55 +00:00
Kenneth Graunke
a90a1f15a7 iris: Create an IRIS_BATCH_BLITTER for using the BLT command streamer
We removed all the hardware blitter support from i965 years ago because
the blitter was not worth using (limited functionality, bad performance,
extra synchronization, and worse).  However, on Tigerlake there are new
blitter commands that are actually fast and allow us to do proper
asynchronous copies while 3D is busy doing other work.

So, reintroduce the blitter.  We'll want to use it.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14687>
2022-01-24 23:27:25 +00:00
Jordan Justen
695ba644ab intel/gem: Return length from intel_i915_query_alloc
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13866>
2022-01-19 00:29:35 +00:00
Lionel Landwerlin
2e3490dd0f iris: utrace/perfetto support
v2: Fixup gpu_id computation, use minor of /dev/dri/* % 128 since we
    don't know whether we get card0 or renderD128 for instance.
    (Lionel)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com> (v1)
Acked-by: Antonio Caggiano <antonio.caggiano@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13996>
2022-01-14 20:17:44 +00:00
Nanley Chery
9a188b10a5 iris: Rework the DEVICE_LOCAL heap
Split it into a local-only heap (which keeps the original enum) and a
local-preferred heap (which has a new enum).

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14012>
2021-12-14 07:37:42 +00:00
Nanley Chery
14ebd81ee3 iris: Replace bo->real.local with bo->real.heap
We'll want to describe more than two placement options for BOs. Switch
to using the more flexible heap enum.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14012>
2021-12-14 07:37:42 +00:00
Dave Airlie
d051854cca treewide: drop mtypes/macros includes from main
These aren't required in lots of places, so remove them.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14127>
2021-12-08 22:14:45 +00:00
Jordan Justen
5c4c8bdc4c iris/batch: Add support for engines contexts
As described in "intel: Add intel_gem_create_context_engines", this
should make it easier to support an I915_ENGINE_CLASS_FOO engine in
the future. For example, maybe something like:

98c3bbd5b5

Reworks:
 * Tweak engine counting logic (s-b Ken)
 * Tweak init of engine_classes in iris_init_engines_context (s-b Ken)
 * Add STATIC_ASSERT on engine_classes (Jordan)
 * Paulo: Call iris_hw_context_set_unrecoverable() for engines context
 * Rename to has_engines_context (s-b Paulo)
 * Jordan: Handle creating a new engines context when the context needs
   to be replaced.
 * Ken: Tweak context destroy code paths.
 * Call iris_lost_context_state on every batch. (s-b Ken)

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12692>
2021-12-02 16:35:32 -08:00
Jordan Justen
f0bec1dd1e iris: Destroy all batches with a new iris_destroy_batches() function
Suggested-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12692>
2021-12-02 16:34:42 -08:00
Jordan Justen
5b4914aaf7 iris: Move away from "hw" for some context terminology
Kernel contexts can take two forms now. In the older case a kernel
context will have a single hardware context. With an "engines" based
context, the context can now have 1 or more hardware contexts.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12692>
2021-12-02 16:31:03 -08:00
Jordan Justen
3643450dc0 iris/batch: Add exec_flags field
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12692>
2021-12-02 16:30:57 -08:00
Jordan Justen
e88dcb38a1 iris/batch: Move kernel context init to iris_init_non_engine_contexts
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12692>
2021-12-02 16:30:49 -08:00
Jordan Justen
5b87f5c88a iris: Add iris_init_batches
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12692>
2021-12-02 16:30:44 -08:00
Kenneth Graunke
3b78f17532 iris: Tidy code in iris_use_pinned_bo a bit
Now that we aren't short-circuiting most of the code, we should probably
reorganize it a little bit.  Tagged with fixes just so we pull all the
refactors together as one group.

Fixes: b21e916a62 ("iris: Combine iris_use_pinned_bo and add_exec_bo")
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13808>
2021-11-17 02:43:30 -08:00
Kenneth Graunke
6e90984934 iris: Check for cross-batch flushing whenever a buffer is newly written.
We need to perform cross-batch flushing if any batch writes to a BO
while others refer to it.  We checked this case when recording a new
BO in the list which we'd never seen before.  However, we neglected to
handle the case when we already read from a BO, but then began writing
to it.  That new write may provoke a conflict between existing reads
in other batches, so we need to re-check the cross-batch flushing.

Caught by Piglit's copyteximage when forcing blits and copies to use
a new IRIS_BATCH_BLITTER that isn't upstream yet.  But this bug could
be provoked by render/compute work today...we just hadn't noticed it.

Fixes: b21e916a62 ("iris: Combine iris_use_pinned_bo and add_exec_bo")
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13808>
2021-11-17 02:43:30 -08:00
Kenneth Graunke
76030964a6 iris: Make a helper function for cross-batch dependency flushing
This should have no functional change, but it's tagged with Fixes
anyway because it's needed for the bug fix in the next patch.

Fixes: b21e916a62 ("iris: Combine iris_use_pinned_bo and add_exec_bo")
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13808>
2021-11-17 02:43:30 -08:00
Paulo Zanoni
785dd68599 iris: also dump bo's imported and exported flags
My original patch also aligned the columns for better printing, but
Ken's recent suballocation series incorporated those changes. My
original patch was also printing the EXEC_OBJECT_ASYNC flag, but this
is not possible anymore as we don't have the validation list here. But
it's fine since EXEC_OBJECT_ASYNC is conditional on
iris_bo_is_external(), which is true for either exported or imported.

Example output:

BO list (length 13):
[ 0]:   8 (  8) command buffer @ 0xfffffffefffdd000 (system    65536B)  2 refs
[ 1]:   1 (  1) workaround     @ 0xfffffffefffff000 (system     4096B)  3 refs
[ 2]:  14 ( 14) dynamic state  @ 0x00000002fffef000 (system    65536B)  2 refs  write
[ 3]:   0 ( 10) miptree        @ 0xfffffffeffc00000 (system   471104B)  4 refs  write
[ 4]:  15 ( 15) shader kernels @ 0x00000000ffff7000 (system    16384B)  2 refs
[ 5]:   0 ( 13) buffer         @ 0xfffffffefe700000 (system  1048576B)  2 refs
[ 6]:   4 (  4) surface state  @ 0x00000001fffef000 (system    65536B)  2 refs
[ 7]:   3 (  3) binder         @ 0x0000000100000000 (system    65536B)  2 refs
[ 8]:  18 ( 18) miptree        @ 0xfffffffeffebd000 (system   524288B)  2 refs  write exported
[ 9]:  11 ( 11) buffer         @ 0xfffffffefe800000 (system 20971520B)  2 refs
[10]:   0 ( 13) buffer         @ 0xfffffffefe600000 (system  1048576B)  2 refs
[11]:  12 ( 12) shader kernels @ 0x00000000ffffb000 (system    16384B)  2 refs
[12]:   5 (  5) buffer         @ 0xfffffffeffffe000 (system     4096B)  2 refs  write

Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12654>
2021-10-22 16:54:42 +00:00
Tapani Pälli
1465ec8cf3 iris: clear bos_written when resetting a batch
This fixes dEQP-EGL.functional.sharing.gles2.multithread.* tests that
are hitting: "iris: Failed to submit batchbuffer: Invalid argument"
error.

v2: clear on reset rather than clear 'on-the-fly' (Kenneth Graunke)

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5537
Fixes: e4c3d3efc7 ("iris: Defer construction of the validation (exec_object2) list")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13464>
2021-10-22 09:37:50 +00:00
Marcin Ślusarz
d05f7b4a2c intel: fix INTEL_DEBUG environment variable on 32-bit systems
INTEL_DEBUG is defined (since 4015e1876a) as:

 #define INTEL_DEBUG __builtin_expect(intel_debug, 0)

which unfortunately chops off upper 32 bits from intel_debug
on platforms where sizeof(long) != sizeof(uint64_t) because
__builtin_expect is defined only for the long type.

Fix this by changing the definition of INTEL_DEBUG to be function-like
macro with "flags" argument. New definition returns 0 or 1 when
any of the flags match.

Most of the changes in this commit were generated using:
for c in `git grep INTEL_DEBUG | grep "&" | grep -v i915 | awk -F: '{print $1}' | sort | uniq`; do
    perl -pi -e "s/INTEL_DEBUG & ([A-Z0-9a-z_]+)/INTEL_DBG(\1)/" $c
    perl -pi -e "s/INTEL_DEBUG & (\([A-Z0-9_ |]+\))/INTEL_DBG\1/" $c
done
but it didn't handle all cases and required minor cleanups (like removal
of round brackets which were not needed anymore).

Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13334>
2021-10-15 19:55:14 +00:00
Kenneth Graunke
ce2e2296ab iris: Suballocate BO using the Gallium pb_slab mechanism
With all the preparation in place to handle suballocated BOs at
submission and export, we can now wire up the actual suballocator.
We use Gallium's pb_slab infrastructure for this, which is already
used for this purpose in the amdgpu winsys and now zink as well.

Unlike those drivers, we don't use pb_buffer (it doesn't do much) nor
pb_cache (we already have a buffer cache).  Just pb_slab for now.

We can now suballocate BOs at power-of-two (or 3/4 power-of-two)
granularity, between 256B and 2MB.  Beyond that, we use actual GEM
objects as before.  This should save us some memory on current GPUs
where we previously had a minimum allocation granularity of 4K (page
size), but should save us a /ton/ of memory on future GPUs where the
minimum page size is 64K.  Fewer actual GEM objects should also mean
shorter exec_object2 lists passed to the kernel, which could reduce
CPU overhead a bit.  Using large allocations where the underlying
GEM objects correspond with the PTE fragment size may also allow the
kernel to use a more efficient page table layout, improving memory
access times.

This cuts nearly half of the memory usage in a Unity3D demo on a
GPU that uses 64K pages.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4722

Acked-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12623>
2021-10-01 04:58:26 +00:00
Kenneth Graunke
38917a6055 iris: Change the validation list debug code to print the BO list instead
This code assumed that batch->exec_bos[i] matched validation_list[i],
which won't be true once we start suballocating BOs.  This patch changes
it to print the full exec_bos[i] list instead of the validation list,
as that has the logical list of objects, names, addresses, placement,
whether they are suballocated, and so on.

It may be useful to look at the actual validation list as well; I'm not
sure how common that is.  We may want to add additional debug prints in
the future.

Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12623>
2021-10-01 04:58:26 +00:00
Kenneth Graunke
fb4e2ccc2b iris: Introduce a BO_ALLOC_NO_SUBALLOC flag and set it in a few places
We don't want to suballocate some buffers, such as ones that we know
we're intending to export to other clients, or ones with special
semantics (such as the workaround BO not having proper synchronization).

Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12623>
2021-10-01 04:58:26 +00:00
Kenneth Graunke
5511e509cd iris: Begin handling slab-allocated wrapper BOs in various places
The vast majority of cases need no handling at all, as they simply
read bo->address or similar fields, which works in either case.

Some other cases simply need to unwrap to look at the underlying BO.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12623>
2021-10-01 04:58:26 +00:00
Kenneth Graunke
8a1fd43d61 iris: Handle multiple BOs backed by the same GEM object in execbuf code
With suballocation, our batch BO list may have multiple BOs that are
suballocated from the same GEM object.  We still need to track each of
those buffers for cross-batch write tracking, cache tracking, and busy
tracking.  However, we only want to include underlying GEM objects in
the actual validation list building.  The validation list entry should
have EXEC_OBJECT_WRITE if any of the BOs are marked as writable.

We use a temporary array to map GEM handles to validation list entries
so we can quickly see if we've already emitted one and update the
EXEC_OBJECT_WRITE flag as needed.

Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12623>
2021-10-01 04:58:26 +00:00
Kenneth Graunke
72a28706a4 iris: Move some iris_bo entries into a union
We would like to start performing slab allocation of resources, where
multiple resources can be backed by a single GEM object.

Originally, I had thought to move busy tracking, cache domain tracking,
and so on into resources themselves, instead of having them at the BO
level.  Multiple resources would point at the same BO with an offset.
Unfortunately, this meant adjusting the batch BO pinning code to take
resources rather than BOs.  That cascades into needing iris_address
for genxml packing to store resources, not BOs.  Which means that places
which have use raw BOs would need to start creating resources instead.
Except some places, like aux BO handling, really don't make sense as
pipe resources and really would rather use raw BOs.  So iris_address
would need to store both, which convolutes the genxml field.  And,
having a BO and resource means that every place in the code needs to
handle that offset correctly.  It sounds simple, but is a giant mess.

Instead, we take a different route: adjust iris_bo itself, so that BOs
are either be backed by a GEM object (as is the case today), or backed
by another underlying BO.  "Real" BOs have bo->gem_handle != 0.  "Slab
allocated" or "fake" or "wrapper" BOs have bo->gem_handle == 0.  We move
fields into a union based on these cases.  amdgpu takes this approach.

This sounds complex at first glance---in theory, every place that
interacts with BOs might need to handle the wrapper BO special case.
But in practice, they don't.  For suballocated BOs, we can set the
wrapper's address field to the underlying BO's address plus any offset,
at which point it looks like any other BO.  Most other properties are
easily queried; the main code that needs updating is execbuf handling
and bufmgr internals.

For now, we simply move the fields.  Any code that accesses either
bo->real.* or bo->gem_handle will need updating in future patches to
actually handle the slab-allocated case.

Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12623>
2021-10-01 04:58:26 +00:00
Kenneth Graunke
e4c3d3efc7 iris: Defer construction of the validation (exec_object2) list
When I wrote this code originally, I decided to try and construct the
validation list up front, rather than at submission time.  That worked
okay, but it's not really necessary.  It's a fair amount of data to
store (struct drm_i915_gem_exec_object2 is 56 bytes per object), when
we can easily construct it on the fly.

More importantly, with suballocation, batch->exec_bos[i] may have
multiple entries corresponding to a single validation list entry.
Rather than tracking two lists with an awkward mapping between them,
we choose to just store the BO list and generate the other on the fly.

Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12848>
2021-09-14 07:36:44 +00:00
Kenneth Graunke
2f0eccf647 iris: Track written BOs via a bitfield rather than exec_object2 entries
When we start suballocating BOs, multiple logical BOs may map to the
same GEM object, and thus share a validation list entry.  However, we
want to track whether logical BOs are written, to avoid unnecessary
cross-batch data dependencies.

Just track that in a bitfield instead, where bit i corresponds to
batch->exec_bos[i].

Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12848>
2021-09-14 07:36:44 +00:00
Paulo Zanoni
26364c6347 iris: signal the syncobj after a failed batch
When a batch fails we either recreate our context (in case we got -EIO
or -ENOMEM) or we abort() (every other error). If we don't abort and a
later batch has a dependency on the batch that failed, then this newer
batch will fail with -EINVAL since it requires a syncobj that was
never submitted, which means we'll abort().

To avoid this problem, in this patch we simply signal syncobjs of
failed batches. This means we may be breaking our dependency tracking,
but IMHO it's better than simply letting it abort() later.

In other words, this moves the situation for some apps from "app
causes a GPU hang and then aborts" to "app causes a GPU hang but keeps
running".

Note: on some older Kernels (like today's Debian 5.10 Kernel) I see X
simply freezing after the GPU hang when the app doesn't decide to
abort(). Switching to a more recent Kernel fixes this issue for me, so
in case it happens to you make sure you have the most recent stable
trees.

v2:
  - Fix coding style (Ken).
  - Use the big comment block provided by Ken (Ken).
  - Adjust the commit message so avoid saying we retry (Ken).
  - Rebase after the syncobj ownership changes.
  - Drive-by add a missing white space in the header.

Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12657>
2021-09-07 19:03:03 +00:00
Paulo Zanoni
89a34cb845 iris: switch to explicit busy tracking
We're moving away from relying on the Kernel's implicit busy tracking
into our own tracking, except for shared buffers.

Not only this shouldn't hurt now (it doesn't, according to my
measurements), when we switch to vm_bind we will be able to cut some
significant overhead by simply omitting all the async buffers from the
execbuf ioctl.

v2:
- Change iris_bo_busy() to bool (Ken).
- Fix coding style issues (Ken).
- Rebase on not having the refcount _inc and _dec helpers anymore
  (Ken).

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4748
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12363>
2021-09-01 21:48:13 +00:00
Paulo Zanoni
b2c811ccdc iris: syncobjs are now owned by bufmgr instead of screen
The next patches will justify the new ownership. We want the BOs to
have references on the batches' syncobjs so we can implement implicit
tracking. In other words: BOs will be able to wait on syncobjs owned
by different screens. Since our syncobjs are actually just a Kernel
handle with a refcount, they can be used globally and it makes more
sense to map them to the bufmgr, just like the BOs.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12363>
2021-09-01 21:48:13 +00:00
Nanley Chery
2944f49610 intel: Parse INTEL_NO_HW for devinfo construction
This commit does several things:

* Unify code common to several drivers by evaluating INTEL_NO_HW within
  intel_get_device_info_from_fd (suggested by Jordan).
* For drivers that keep a copy of the intel_device_info struct, a
  separate copy of the no_hw field is now unnecessary. Remove them.
* Minimize kernel queries when INTEL_NO_HW is true. This is done for
  code simplification, but we may find reason to undo this later on.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12007>
2021-08-24 00:12:47 +00:00
Paulo Zanoni
03d17461f3 iris: use add_bo_to_batch() when adding batch->bo
Again, we don't need all the dependency checking, seqno incrementing
and duplicate tracking for batch->bo. Just use the unchecked version.

This commit is not particularly significant since it really just saves
us a check in the iris_use_pinned_bo() hot path, but since we already
have the helper function, why not?

v2:
 - (turns out the answer to "why not?" is because the patch had a bug)
 - Call ensure_exec_obj_space() since batch batch chaining can happen
   and doesn't guarantee pre-reserved space (Ken).

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12194>
2021-08-11 15:04:52 -07:00
Paulo Zanoni
155a7a9b0f iris: add the workaround_bo directly to the batch
Don't use iris_use_pinned_bo(), go directly with add_bo_to_batch(),
skipping every check. This allows us to early return from
iris_use_pinned_bo when the workaround bo is used, saving us the call
to find_validation_entry() which ends up doing nothing except
iterating over every bo in the batch. Also don't bother with
ensure_exec_obj_space() since we just reset the batch and this is the
second BO we're adding to it.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12194>
2021-08-11 15:04:52 -07:00
Paulo Zanoni
d07fa0ef60 iris: extract the code that adds BOs to the batch lists
We want to add a new caller, so extract this first.

v2: kflags can never contain EXEC_OBJECT_WRITE (Ken).
v3: Rebase after s/gtt_offset/address/.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12194>
2021-08-11 15:04:52 -07:00
Paulo Zanoni
805c5dcd59 iris: assign bo->index to the aux map BOs too
I don't see these BOs being searched for in the benchmarks I tested so
I don't think this should improve anything. On the other hand, it
shouldn't hurt either since it's just an extra assignment.

I want to unify both places where we have this code into a single
function and the lack of the bo->index assignment was the only
difference between the two places. So first we make both functions the
same and in the next commit we'll unify things. This should make
bisecting easier in case I'm wrong.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12194>
2021-08-11 15:04:52 -07:00
Paulo Zanoni
f7102bed69 iris: don't bump the seqno for the workaround_bo
The last_seqnos list is used by iris_emit_buffer_barrier_for() and as
far as I can understand we don't emit barriers for the workaround bo,
so don't even bother doing the atomic operations required to bump the
workaround_bo seqno list.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12194>
2021-08-11 15:04:52 -07:00
Kenneth Graunke
2616e15c01 iris: Rename bo->gtt_offset to bo->address
This is the virtual memory address of the buffer object.  Calling it the
BO's address is a lot more obvious than calling it an offset in one of
the now many graphics translation tables.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12206>
2021-08-11 08:05:00 +00:00
Kai-Heng Feng
f9d8d9acbb iris: Avoid abort() if kernel can't allocate memory
When the system doesn't have enough memory, GNOME Shell may be crashed
by iris:
gnome-shell[1161]: iris: Failed to submit batchbuffer: Cannot allocate memory
gnome-shell[1161]: GNOME Shell crashed with signal 6

So don't abort() when kernel can't allocate memory to avoid crashing the
entire desktop.

Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11178>
2021-06-17 09:04:17 +00:00
Paulo Zanoni
697804ba49 iris: finish converting from drmIoctl to intel_ioctl
Only 3 remaining users. The implementations are exactly the same.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11194>
2021-06-09 08:00:55 +00:00
Kenneth Graunke
32c5d6d1dc iris: Add an alignment parameter to iris_bo_alloc()
This is rarely useful, but after the next patch removes tiling tracking,
this would literally be the only difference between iris_bo_alloc and
iris_bo_alloc_tiled, so we may as well add it.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11169>
2021-06-07 10:35:25 -07:00
Kenneth Graunke
539494e767 iris: Add a flags argument to iris_bo_alloc()
Based on a patch by Rafael Antognolli.

We already had a flags parameter, but omitted it from the simple alloc
interface because most callers were passing 0.  However, we'll want to
use it for selecting between device local memory and system memory, and
possibly mmap cacheability modes, in the future.  At that point, many
more callers will want to specify, so I think we should include flags
in iris_bo_alloc() as well.

A few places used the iris_bo_alloc_tiled() function simply to pass
flags, so this patch converts them to use iris_bo_alloc() instead now
it does everything they want.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11169>
2021-06-07 10:35:25 -07:00
Anuj Phogat
61e8636557 intel: Rename gen_device prefix to intel_device
export SEARCH_PATH="src/intel src/gallium/drivers/iris src/mesa/drivers/dri/i965"
grep -E "gen_device" -rIl $SEARCH_PATH | xargs sed -ie "s/gen_device/intel_device/g"

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10241>
2021-04-20 20:06:33 +00:00
Francisco Jerez
0f247cc8a9 iris/gfx12: Invalidate ISP at the end of every batch.
As requested by Ken since we're now (after 20e2c7308f)
re-emitting constants at the beginning of every batch which may lead
to some redundant constant restore overhead.  No statistically
significant performance changes observed with either change.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9903>
2021-04-19 23:50:32 +00:00
Marcin Ślusarz
f33852e268 iris: fix decode_get_bo
It tries to be helpful by returning BO metadata matching exactly
the requested address, but it "forgets" to fix the remaining size.
The only caller of this function (ctx_get_bo) already deals with
raw BO metadata, so return it as such instead of fixing size too.

Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9707>
2021-03-22 08:36:55 +00:00
Anuj Phogat
96e251bde7 intel: Rename "GEN_" prefix used in common code to "INTEL_"
This patch renames all macros with "GEN_" prefix defined in
common code.

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9413>
2021-03-10 22:23:51 +00:00
Anuj Phogat
65d7f52098 intel: Fix broken alignment due to gen_ prefix renaming
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9413>
2021-03-10 22:23:51 +00:00
Anuj Phogat
692472a376 intel: Rename "gen_" prefix used in common code to "intel_"
This patch renames functions, structures, enums etc. with "gen_"
prefix defined in common code.

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9413>
2021-03-10 22:23:51 +00:00
Anuj Phogat
733b0ee8cb intel: Rename files with gen_ prefix in common code to intel_
Changes in this patch include:
- Rename all files in src/intel/common path
- Update the filenames used in source and build files

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9413>
2021-03-10 22:23:51 +00:00
Eleni Maria Stea
adc575dbf6 iris: fix in fences backend for ext_external_objects edge case
EXT_external_objects require we call glSignalSemaphoreEXT followed by a
glFlush. If the rendering workload is small when Signal and Flush
take place the relevant batch buffers with the actual rendering might
have been submitted already. In that case the following condition is met:
(iris_batch_bytes_used(batch) == 0). This causes:
glFlush() --> iris_fence_flush() -> iris_batch_flush() ->
_iris_batch_flush() to no-op, and so the fence doesn't get submitted to the
kernel. Then when anv tries to submit an execuf2 that must wait on the
shared VkSempahore / drm_syncobj fence, there isn't one and the kernel
rejects the batchbuffer causing an -EINVAL return of the execbuf2 ioctl
and a VK_DEVICE_LOST error. Empty batch buffers do have typically one
fence attached, but the ones carrying the extra fence from a
glSignalSempahore() call do have at least 2.

See also: the discussion in MR!4337.

v2: Changed the batch struct to have a contains_fence_signal variable
that is set to true when i915_EXEC_FENCE_SIGNAL fence is added to the
batch and off when batch is reset (Tapani Pälli)

Authored-by: Mario Kleiner <mario.kleiner.de@gmail.com>
Reported-by: Mario Kleiner <mario.kleiner.de@gmail.com>
Tested-by: Mario Kleiner <mario.kleiner.de@gmail.com>
Signed-off-by: Eleni Maria Stea <elene.mst@gmail.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Mario Kleiner <mario.kleiner.de@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8861>
2021-03-02 05:47:06 +00:00
Kenneth Graunke
f7d4ebbf86 iris: add hooks to call INTEL_MEASURE
These hooks were written in the initial IRIS_MEASURE implementation.
Minor changes by Mark Janes <markjanes@swizzler.org> to adapt to the
INTEL_MEASURE reimplementation.

Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7354>
2021-02-01 17:24:57 -08:00