Commit graph

174989 commits

Author SHA1 Message Date
José Roberto de Souza
0584bb450e anv: Nuke unused READ_ONCE() from anv_batch_chain.c
Only genX_cmd_buffer.c makes use of READ_ONCE() but that file also
defines it so it can be removed from anv_batch_chain.c.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24411>
2023-08-01 22:30:04 +00:00
David Rosca
ad9d39a5ba ci/amd: Skip VAAPI CreateSurfacesWithConfigAttribs/1121 test
It now times out with surfaces being allocated non-interlaced
by default due to a slower path being taken in clear_render_target.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24361>
2023-08-01 21:58:27 +00:00
David Rosca
71f7d4e673 radeonsi: Don't prefer interlaced for video decode
Preferring interlaced results in all surfaces being allocated
as interlaced for H264 decode regardless of whether the decoded
pic is interlaced or progressive, which makes VA postproc
apply deinterlacing even for progressive pics.

Deinterlacing interlaced pics still works because VA frontend
will now reallocate surface as interlaced when decoding interlaced
pics.

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24361>
2023-08-01 21:58:27 +00:00
David Rosca
0ee4506c3a frontends/vdpau: Alloc interlaced surface for interlaced pics
When decoding interlaced pics, the output surface should
also be allocated as interlaced to make the deinterlace
postproc filter work correctly.

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24361>
2023-08-01 21:58:27 +00:00
David Rosca
578e10e157 frontends/va: Alloc interlaced surface for interlaced pics
When decoding interlaced pics, the output surface should
also be allocated as interlaced to make the deinterlace
postproc filter work correctly.

This makes deinterlacing work for drivers that supports, but
not prefers, interlaced surfaces.

Use extra buffer instead of reallocating as non-interlaced
when exporting interlaced surfaces.

v2: Avoid reallocating in vlVaExportSurfaceHandle

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24361>
2023-08-01 21:58:27 +00:00
Italo Nicola
d7b9da2673 mesa/main: allow readpix/teximage to read from implicitly multisampled fbos
The GL_EXT_multisampled_render_to_texture spec explicitly allow reading
from these FBOs.

"Similarly, for ReadPixels:
 'An INVALID_OPERATION error is generated if the value of READ_-
FRAMEBUFFER_BINDING (see section 9) is non-zero, the read framebuffer is
framebuffer complete, and the value of SAMPLE_BUFFERS for the read
framebuffer is one.'

 These errors do not apply to textures and renderbuffers that have
associated multisample data specified by the mechanisms described in
this extension, i.e., the above operations are allowed even when
SAMPLE_BUFFERS is non-zero for renderbuffers created via Renderbuffer-
StorageMultisampleEXT or textures attached via FramebufferTexture2D-
MultisampleEXT."

Signed-off-by: Italo Nicola <italonicola@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10747>
2023-08-01 21:22:28 +00:00
Italo Nicola
4d1a07c1a0 mesa/main: account for RTT samples when updating framebuffer
For EXT_multisampled_render_to_texture, we store the number of samples
in Attachment->NumSamples instead of Renderbuffer->NumSamples. This
meant that the previous code ignored that the framebuffer was
multisampled. Because of this, pipe_rasterizer_state::multisample is set
incorrectly, leading to visual artifacts on drivers that support MS-RTT
extension, such as panfrost.

Signed-off-by: Italo Nicola <italonicola@collabora.com>
Reviewed-by: Rob Clark <robclark@freedesktop.org>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10747>
2023-08-01 21:22:28 +00:00
Mike Blumenkrantz
ba72946fa3 gallium: bump PIPE_MAX_SO_OUTPUTS to 128
this is the number of components supported for streamout

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24285>
2023-08-01 20:47:34 +00:00
Mike Blumenkrantz
b1cca11220 ir3: bump max xfb output to 128
this is the number of components supported for streamout

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24285>
2023-08-01 20:47:34 +00:00
Mike Blumenkrantz
4d8c53b070 radv: bump max xfb output to 128
this is the number of components supported for streamout

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24285>
2023-08-01 20:47:34 +00:00
jazzfool
f70fb753b9 zink: Hash only first 32 bits of zink_gfx_pipeline_state with full DS3
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8245
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24430>
2023-08-01 20:19:40 +00:00
José Roberto de Souza
373019f9ef intel/genxml/gen125: Set MI_MATH MOCS field as non-zero
All MOCS tables have 0 as a invalid value, so this will asssert
in case some place misset to set MI_MATH MOCS field.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22508>
2023-08-01 19:49:45 +00:00
José Roberto de Souza
b0b763d0be intel/tests/mi_builder: Set MI_MATH MOCS field
MOCS = 0 is a invalid MOCS index on MTL, so it is necessary get a
valid value and set to MI_MATH instructions.

So here the mocs index is set with mi_builder_set_mocs(), it can be
always set but it is required when mi_build will emit MI_MATH
instructions.
The mocs index will only be stored and used in gfx12.5+ platforms
so no changes were are required in crocus or hasvk.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22508>
2023-08-01 19:49:45 +00:00
José Roberto de Souza
a7ab31b96a anv: Set MI_MATH MOCS field
MOCS = 0 is a invalid MOCS index, so it is necessary get a valid value
and set to MI_MATH instructions.

So here the mocs index is set with mi_builder_set_mocs(), it can be
always set but it is required when mi_build will emit MI_MATH
instructions.
The mocs index will only be stored and used in gfx12.5+ platforms
so no changes were are required in crocus or hasvk.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22508>
2023-08-01 19:49:45 +00:00
José Roberto de Souza
d0890a0b8b iris: Set MI_MATH MOCS field
MOCS = 0 is a invalid MOCS index on MTL, so it is necessary get a
valid value and set to MI_MATH instructions.

So here the mocs index is set with mi_builder_set_mocs(), it can be
always set but it is required when mi_build will emit MI_MATH
instructions.
The mocs index will only be stored and used in gfx12.5+ platforms
so no changes were are required in crocus or hasvk.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22508>
2023-08-01 19:49:44 +00:00
José Roberto de Souza
0233e3639f intel/genxml/gen125: Add missing fields in MI_MATH
BSpec: 53415
BSpec: 45737
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22508>
2023-08-01 19:49:44 +00:00
Faith Ekstrand
ae105ad5cd anv: Use the common versions of vkBegin/EndQuery()
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24409>
2023-08-01 19:17:05 +00:00
Faith Ekstrand
e4485bc062 anv: Use vk_query_pool
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24409>
2023-08-01 19:17:05 +00:00
Faith Ekstrand
f2930ec5dd vulkan: Add init/finish helpers for vk_query_pool
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24409>
2023-08-01 19:17:05 +00:00
Faith Ekstrand
1d6d775ffe anv: Use vk_buffer_view
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24409>
2023-08-01 19:17:05 +00:00
Faith Ekstrand
92f996d0fa anv: Use vk_sampler
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24409>
2023-08-01 19:17:05 +00:00
M Henning
d4086be6bc nv/codegen: Implement nir_op_fquantize2f16
Passes most of dEQP-VK.spirv_assembly.instruction.graphics.opquantize.* but
not the too_small_* tests for some reason. (Tested on kepler.)

Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24327>
2023-08-01 18:58:04 +00:00
Faith Ekstrand
6023943b81 nv50/ir: Run nir_divergence_analysis before out-of-SSA
We don't actually use or need this information but it gets generated by
nir_opt_non_uniform_access() and stale divergence information can cause
out-of-SSA to assert in parallel copy lowering.

Reviewed-by: M Henning <drawoc@darkrefraction.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24327>
2023-08-01 18:58:04 +00:00
George Ouzounoudis
cdece16cf4 nouveau/codegen: Add capability to pre-specify tessellation domain
In the case of SPIRV tessellation shaders, the execution mode can be
specified in the tessellation control shader. So we need a way to know the domain
when compiling the tessellation evaluation shader.

Acked-by: M Henning <drawoc@darkrefraction.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24327>
2023-08-01 18:58:04 +00:00
George Ouzounoudis
df5d1ef2b5 nouveau/codegen: Fix compact patch varyings in case of NIR
The code path was not implemented and an assert was reached.

Reviewed-by: M Henning <drawoc@darkrefraction.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24327>
2023-08-01 18:58:03 +00:00
Faith Ekstrand
b96639011c nouveau/codegen: Don't convertSurfaceFormat for unknown formats
Without this and the previous patch, it would see PIPE_FORMAT_NONE as a
zero-component format and delete the whole load.

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24327>
2023-08-01 18:58:03 +00:00
Faith Ekstrand
2200d3c2e7 nouveau/codegen: Use a NULL format for PIPE_FORMAT_NONE for images
Get rid of our own FMT_NONE and just use a NULL format in that case.
We're already checking su->tex.format != NULL in a bunch of cases but
none of those NULL checks are doing anything right now execpt detecting
when its an actual texture op and not an image op.  We'd like them to
start also applying for image load/store with an unspecified format.

Reviewed-by: M Henning <drawoc@darkrefraction.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24327>
2023-08-01 18:58:03 +00:00
George Ouzounoudis
f453623255 nouveau/codegen: Handle nir op amul
This came from CTS clipping tests with geometry shaders.  Maybe can be
done as a lowering operation instead.

Reviewed-by: M Henning <drawoc@darkrefraction.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24327>
2023-08-01 18:58:03 +00:00
George Ouzounoudis
43b8da3a8b nouveau/codegen: Support compact clip distances with arrayed_io
Reviewed-by: M Henning <drawoc@darkrefraction.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24327>
2023-08-01 18:58:03 +00:00
Rebecca Mckeever
6990439eb8 nouveau/codegen: Set lower_device_index_to_zero
This instructs NIR to lower DeviceIndex to zero, which is needed
for a no-op implementation of VK_KHR_device_group.

Signed-off-by: Rebecca Mckeever <rebecca.mckeever@collabora.com>
Reviewed-by: M Henning <drawoc@darkrefraction.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24327>
2023-08-01 18:58:03 +00:00
Rebecca Mckeever
e2221a9cac nouveau/codegen: Support nir_intrinsic_load_workgroup_id_zero_base
Signed-off-by: Rebecca Mckeever <rebecca.mckeever@collabora.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24327>
2023-08-01 18:58:03 +00:00
Faith Ekstrand
f9d385d777 nouveau/codegen: Handle/indirect goes before sample index
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24327>
2023-08-01 18:58:03 +00:00
Faith Ekstrand
1f60923b89 nouveau/nir: Implement support for compact arrays
This is needed for clip and cull distances.

Reviewed-by: M Henning <drawoc@darkrefraction.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24327>
2023-08-01 18:58:03 +00:00
M Henning
77acf89336 nv/codegen: Call nir_shader_gather_info
We need this info to be up-to-date for slot assignment.

Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24327>
2023-08-01 18:58:03 +00:00
Faith Ekstrand
9a2d016021 nouveau: Allow GLSL_SAMPLER_DIM_SUBPASS*
Reviewed-by: M Henning <drawoc@darkrefraction.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24327>
2023-08-01 18:58:03 +00:00
Faith Ekstrand
9cb70c6ee0 nv50/nir: Lower to scratch AFTER optimization
Reviewed-by: M Henning <drawoc@darkrefraction.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24327>
2023-08-01 18:58:03 +00:00
Erico Nunes
21424577cb lima/gpir: switch to register intrinsics
gp has explicit load and store reg instructions so it can implement
the new nir_intrinsic_{decl,load,store}_reg intrinsics.
The implementation reuses the gpir_node_find and register_node functions
instead of just emitting load and store instructions in order to
preserve the behavior that there will never be a store_reg followed by
a load_reg of the same register in the same block.

Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24246>
2023-08-01 18:36:50 +00:00
Erico Nunes
9ad3a80b13 lima/ppir: convert to nir_legacy
With the upcoming transition away from nir_register and modifiers in
nir, ppir needs to prepare for those features to be removed.
The most straightforward way for ppir without major reworks at this time
is to use the new nir_legacy helpers so that most of the backend can be
kept untouched (particularly due to use of abs/neg/sat modifiers).
Do this for now to unblock the transition with little impact; ppir can
be optimized at a later moment to have its own passes which will allow
it to drop the nir_legacy use and use just the chasing helpers.

Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24246>
2023-08-01 18:36:50 +00:00
Erico Nunes
87a1703949 lima/ppir: don't optimize loads with different block successors
Even if loads are initially duplicated for each user, with new
optimizations such as folding modifiers, it may happen that loads
end up with only users in different blocks.
Handle that and don't delete or pipeline those nodes.

Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24246>
2023-08-01 18:36:49 +00:00
Emma Anholt
c124fa4a4f Revert "ci: Disable nouveau CI"
This reverts commit 1440a0f95b.

runner got wedged, it's back up now.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24427>
2023-08-01 18:19:40 +00:00
Georg Lehmann
82920c99a5 aco: fix non constant 16bit bitnz/bitz
Fixes: 573e98f34a ("aco: implement nir_op_bitz/bitnz")
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24420>
2023-08-01 15:54:31 +00:00
David Rosca
12a4f2c132 frontends/va: Also map VAImageBufferType for reading
VAImageBufferType can be used for both reading and writing,
so map it as such.

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24390>
2023-08-01 15:36:04 +00:00
Adam Jackson
f41ce4b210 mesa: Implement and advertise GL_MESA_sampler_objects
This is the GLES3 sampler object API trivially backported to GLES2,
because it allows for simpler/better support in glamor and mutter.

The only code change we need is adding these to the generated dispatch
tables for ES2 contexts. The interactions with EXT_shadow_samplers,
EXT_texture_filter_anisotropic and EXT_texture_sRGB_decode are already
in place before this change, and OES_texture_border_clamp is always
supported in Mesa.

Reviewed-by: Zoltán Böszörményi <zboszor@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2440>
2023-08-01 14:52:10 +00:00
Alyssa Rosenzweig
18b2daa136 gallium/u_simple_shaders: Optimize out ffloors
ffloor(f2i(x)) can't be optimized to f2i(x) due to differing behaviour for
negative x, but u_blitter only uses this with nonnegative x so we can instead
use ftrunc(f2i(x)) which NIR will optimize to f2i(x) for us. This gets rid of
the silly ffloor instructions in blit shaders.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24319>
2023-08-01 14:04:08 +00:00
Alyssa Rosenzweig
ff9423b693 nir/schedule: Assume no old-style registers
True for all users. I intentionally didn't add is_ssa asserts because they're
pointless and will be deleted, like, next week and will just make that churn
even more annoying.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24319>
2023-08-01 14:04:07 +00:00
Karol Herbst
caa52774ae rusticl/nir: use the new nir_pass macro
Signed-off-by: Karol Herbst <git@karolherbst.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21451>
2023-08-01 13:16:55 +00:00
Karol Herbst
237feff917 rusticl/nir: add a nir_pass macro
Signed-off-by: Karol Herbst <git@karolherbst.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21451>
2023-08-01 13:16:55 +00:00
Karol Herbst
78dd9f4a42 rusticl/nir: add helper functions we need for a NIR_PASS macro
Signed-off-by: Karol Herbst <git@karolherbst.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21451>
2023-08-01 13:16:55 +00:00
Karol Herbst
ec93d46a7c meson,ci: bump meson req for rusticl to 1.2
Signed-off-by: Karol Herbst <git@karolherbst.de>
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21451>
2023-08-01 13:16:55 +00:00
Igor Torrente
388bf84c07 zink: Removes disable_xcb_surface
This dri config is no longer necessary since the case where it was
required is being handled in the previous commit.

Reviewed-by: Adam Jackson <ajax@redhat.com>
Signed-off-by: Igor Torrente <igor.torrente@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24222>
2023-08-01 12:27:55 +00:00