fdo-mirrors/mesa
1
0
Fork 0
mirror of https://gitlab.freedesktop.org/mesa/mesa.git synced 2026-05-09 06:48:06 +02:00
Code Issues Projects Releases Packages Wiki Activity Actions 1

iris: Set MI_MATH MOCS field

Browse source 
MOCS = 0 is a invalid MOCS index on MTL, so it is necessary get a
valid value and set to MI_MATH instructions.

So here the mocs index is set with mi_builder_set_mocs(), it can be
always set but it is required when mi_build will emit MI_MATH
instructions.
The mocs index will only be stored and used in gfx12.5+ platforms
so no changes were are required in crocus or hasvk.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22508>
This commit is contained in:
José Roberto de Souza 2023-07-17 14:06:22 -07:00 • committed by Marge Bot
parent 0233e3639f
commit d0890a0b8b
3 changed files with 36 additions and 0 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

4
src/gallium/drivers/iris/iris_query.c
View file

@ -730,6 +730,8 @@ iris_get_query_result_resource(struct pipe_context *ctx,
struct mi_builder b;
mi_builder_init(&b, batch->screen->devinfo, batch);
const uint32_t mocs = iris_mocs(query_bo, &batch->screen->isl_dev, 0);
mi_builder_set_mocs(&b, mocs);
iris_batch_sync_region_start(batch);
@ -801,6 +803,8 @@ set_predicate_for_result(struct iris_context *ice,
struct mi_builder b;
mi_builder_init(&b, batch->screen->devinfo, batch);
const uint32_t mocs = iris_mocs(bo, &batch->screen->isl_dev, 0);
mi_builder_set_mocs(&b, mocs);
struct mi_value result;

9
src/gallium/drivers/iris/iris_state.c
View file

@ -7647,6 +7647,7 @@ iris_upload_render_state(struct iris_context *ice,
#define _3DPRIM_BASE_VERTEX 0x2440
struct mi_builder b;
uint32_t mocs;
mi_builder_init(&b, batch->screen->devinfo, batch);
if (indirect && !indirect->count_from_stream_output) {
@ -7657,6 +7658,8 @@ iris_upload_render_state(struct iris_context *ice,
iris_resource_bo(indirect->indirect_draw_count);
unsigned draw_count_offset =
indirect->indirect_draw_count_offset;
mocs = iris_mocs(draw_count_bo, &batch->screen->isl_dev, 0);
mi_builder_set_mocs(&b, mocs);
if (ice->state.predicate == IRIS_PREDICATE_STATE_USE_BIT) {
/* comparison = draw id < draw count */
@ -7701,6 +7704,9 @@ iris_upload_render_state(struct iris_context *ice,
struct iris_bo *bo = iris_resource_bo(indirect->buffer);
assert(bo);
mocs = iris_mocs(bo, &batch->screen->isl_dev, 0);
mi_builder_set_mocs(&b, mocs);
mi_store(&b, mi_reg32(_3DPRIM_VERTEX_COUNT),
mi_mem32(ro_bo(bo, indirect->offset + 0)));
mi_store(&b, mi_reg32(_3DPRIM_INSTANCE_COUNT),
@ -7722,6 +7728,9 @@ iris_upload_render_state(struct iris_context *ice,
(void *) indirect->count_from_stream_output;
struct iris_bo *so_bo = iris_resource_bo(so->offset.res);
mocs = iris_mocs(so_bo, &batch->screen->isl_dev, 0);
mi_builder_set_mocs(&b, mocs);
iris_emit_buffer_barrier_for(batch, so_bo, IRIS_DOMAIN_OTHER_READ);
struct iris_address addr = ro_bo(so_bo, so->offset.offset);

23
src/intel/common/mi_builder.h
View file

@ -139,6 +139,10 @@ struct mi_builder {
unsigned num_math_dwords;
uint32_t math_dwords[MI_BUILDER_MAX_MATH_DWORDS];
#endif
#if GFX_VERx10 >= 125
uint32_t mocs;
#endif
};
static inline void
@ -166,6 +170,9 @@ mi_builder_flush_math(struct mi_builder *b)
uint32_t *dw = (uint32_t *)__gen_get_batch_dwords(b->user_data,
1 + b->num_math_dwords);
mi_builder_pack(b, GENX(MI_MATH), dw, math) {
#if GFX_VERx10 >= 125
math.MOCS = b->mocs;
#endif
math.DWordLength = 1 + b->num_math_dwords - GENX(MI_MATH_length_bias);
}
memcpy(dw + 1, b->math_dwords, b->num_math_dwords * sizeof(uint32_t));
@ -173,6 +180,22 @@ mi_builder_flush_math(struct mi_builder *b)
#endif
}
/**
* Set mocs index to mi_build
*
* This is required when a MI_MATH instruction will be emitted and
* the code is used in GFX 12.5 or newer.
*/
static inline void
mi_builder_set_mocs(UNUSED struct mi_builder *b, UNUSED uint32_t mocs)
{
#if GFX_VERx10 >= 125
if (b->mocs != 0 && b->mocs != mocs)
mi_builder_flush_math(b);
b->mocs = mocs;
#endif
}
#define _MI_BUILDER_GPR_BASE 0x2600
/* The actual hardware limit on GPRs */
#define _MI_BUILDER_NUM_HW_GPRS 16