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Author SHA1 Message Date
Georg Lehmann
d4084f7f09 aco/lower_to_hw: remove gfx6/7 subdword paths 
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28836>
 2024-05-02 11:09:36 +00:00
Georg Lehmann
6ecbda83f8 aco/ra: remove gfx6/7 subdword paths 
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28836>
 2024-05-02 11:09:35 +00:00
Georg Lehmann
d914ff3aa5 aco: add tests for lower_subdword 
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28836>
 2024-05-02 11:09:35 +00:00
Georg Lehmann
47566d0df3 aco: add a subdword lowering pass 
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28836>
 2024-05-02 11:09:35 +00:00
Georg Lehmann
6b35de971c aco/lower_to_hw: don't use regClass to identify subdword reductions 
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28836>
 2024-05-02 11:09:35 +00:00
Samuel Pitoiset
8c4d0b287f radv: emit compute pipelines directly from the cmdbuf 
Using this intermediate CS isn't really useful and it prevents us to
optimize register writes in the near future. This will also be removed
for graphics pipelines.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28977>
 2024-05-02 10:39:03 +00:00
Timur Kristóf
72a73a6f8a ac/nir/legacy: Use new pre-rasterization output info helper. 
For legacy VS/TES and GS.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28936>
 2024-05-02 12:05:52 +02:00
Timur Kristóf
4ac0727f87 ac/nir/ngg: Use new pre-rasterization output info helper. 
For NGG VS/TES and GS.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28936>
 2024-05-02 12:05:39 +02:00
Timur Kristóf
b1819d60ea ac/nir: Add helper for pre-rasterization output info. 
This is made to unify the handling of outputs in all
different pre-rasterization lowerings.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28936>
 2024-05-02 12:05:08 +02:00
Timur Kristóf
039e739eea ac/nir: Move some helpers to new file. 
Also remove nir_builder include from ac_nir.h.
This is done so that driver code doesn't need to be recompiled
when some internal parts of ac/nir in the new helper header
is changed.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28936>
 2024-05-02 12:04:53 +02:00
Timur Kristóf
cd66b77af0 aco: Add missing nir_builder include. 
We would like to avoid including it in ac_nir.h
so ACO will need to include nir_builder.h on its own.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28936>
 2024-05-02 12:04:04 +02:00
Marek Olšák
d4cfcbdde8 nir: add ACCESS_CP_GE_COHERENT_AMD 
required by amd gfx12

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Acked-By: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28889>
 2024-04-30 17:17:25 +00:00
Samuel Pitoiset
86281ef15f radv: add shaders BO to the cmdbuf BO list at bind time 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28965>
 2024-04-30 07:18:08 +00:00
Samuel Pitoiset
42554e81b9 radv: add RT prolog BO to the cmdbuf BO list at bind time 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28965>
 2024-04-30 07:18:08 +00:00
Samuel Pitoiset
42dc4b463b radv: add GS copy shader BO to the cmdbuf BO list at bind time 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28965>
 2024-04-30 07:18:08 +00:00
Samuel Pitoiset
2664e058de radv: use the bound GS copy shader when emitting shader objects 
Similar but doesn't rely on shader_objs.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28965>
 2024-04-30 07:18:08 +00:00
Samuel Pitoiset
be98fe2724 radv: pre-compute VGT_TF_PARAM.DISTRIBUTION_MODE 
For less CPU overhead.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28965>
 2024-04-30 07:18:08 +00:00
Samuel Pitoiset
d7679c0370 radv: remove useless DB_Z_INFO.NUM_SAMPLES when emitting the MSAA state 
DB_Z_INFO.NUM_SAMPLES is now correctly set when a null framebuffer is
emitted and this is redundant.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28965>
 2024-04-30 07:18:08 +00:00
Samuel Pitoiset
4dd682e227 radv: inline radv_get_pa_su_sc_mode_cntl() in radv_emit_culling() 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28965>
 2024-04-30 07:18:08 +00:00
Samuel Pitoiset
e651a2c856 radv: simplify radv_emit_primitive_restart_enable() 
Move emitting VGT_MULTI_PRIM_IB_RESET_INDX into the GFX6-8 branch.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28965>
 2024-04-30 07:18:08 +00:00
Marek Olšák
8416ba9c25 amd/ci: 17 piglit failures are fixed for raven 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28846>
 2024-04-30 06:47:21 +00:00
Marek Olšák
c87ce78d10 ac/surface: enable thick tiling for 3D textures for better perf on gfx6-8 
This increases performance 2.5x for Viewperf/Energy on Tonga.
The value of thick_tiling is also fixed.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28846>
 2024-04-30 06:47:20 +00:00
Marek Olšák
33f642aa09 ac/surface: disable DCC for 3D textures on gfx9 to improve performance 
This improves Viewperf/Energy perf by 60% on Vega10.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28846>
 2024-04-30 06:47:20 +00:00
Marek Olšák
e05aec3fcd ac/gpu_info: set tcc_rb_non_coherent only if number of TCCs != number of RBs 
This sets it to false for Navi31 to eliminate unnecessary L2 cache
invalidations.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28846>
 2024-04-30 06:47:20 +00:00
Samuel Pitoiset
0b51868193 radv: remove bogus VkShaderCreateInfoEXT::flags being 0 assert for compute 
This was a leftover. Flags can be different than 0, like for required
subgroup size and it should already be correctly supported.

Fixes recent dEQP-VK.shader_object.performance.dispatch_base.

Fixes: 37d7c2172b ("radv: add support for creating/destroying shader objects")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28946>
 2024-04-29 11:45:03 +00:00
Samuel Pitoiset
85deb9f706 radv: simplify DB_Z_INFO.NUM_SAMPLES with null ds target on GFX11 
According to PAL, the hw uses the smaller value of
DB_Z_INFO.NUM_SAMPLES and PA_SC_AA_CONFIG.MSAA_EXPOSED_SAMPLES when
there is no bound depth/stencil buffer, and it uses 8x to make sure
the used value is MSAA_EXPOSED_SAMPLES.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28952>
 2024-04-29 11:02:02 +00:00
Samuel Pitoiset
dfe5e56671 radv/ci: add more flakes 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28963>
 2024-04-29 08:34:45 +02:00
David Rosca
1f07f5a79b radv/video: Report maxBitrate in encode capabilities 
Some cards can do higher bitrate, but 1000 Mbit/s should be high enough
for any practical use. It's also the value that AMF reports as max bitrate.

Fixes: 54d499818c ("radv/video: add initial support for encoding with h264.")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28736>
 2024-04-26 09:18:29 +00:00
David Rosca
c210bb7952 radv/video: Check encode profiles and bit depth in capabilities query 
Fixes: 967e4e09de ("radv/video: add h265 encode support")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28736>
 2024-04-26 09:18:29 +00:00
David Rosca
2d0282f576 radv/video: Set correct bit depth and format for 10bit input 
Fixes: 967e4e09de ("radv/video: add h265 encode support")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11011
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28736>
 2024-04-26 09:18:29 +00:00
Rhys Perry
ae866966e6 aco/tests: add tests for divergent merge phi with undef 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28661>
 2024-04-26 08:39:01 +00:00
Rhys Perry
0f61e0c27e aco/tests: add tests for hidden breaks/continues 
ACO might add breaks/continues which didn't exist in the NIR.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28661>
 2024-04-26 08:39:01 +00:00
Daniel Schürmann
6b3e14ba83 aco/optimizer: remove p_linear_phi handling from optimizer 
We remove trivial phis during value numbering, now.
And the undef optimization seems to have no positive effect.

Totals from 22 (0.03% of 79206) affected shaders: (GFX10.3)

Instrs: 168529 -> 168260 (-0.16%)
CodeSize: 912692 -> 911704 (-0.11%)
Latency: 2607549 -> 2607335 (-0.01%)
InvThroughput: 1124171 -> 1124109 (-0.01%)
SClause: 5694 -> 5698 (+0.07%)
Copies: 23503 -> 23364 (-0.59%)
Branches: 8185 -> 8058 (-1.55%)
PreSGPRs: 1536 -> 1531 (-0.33%)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28661>
 2024-04-26 08:39:01 +00:00
Daniel Schürmann
2d0c6647f0 aco: use SGPR phi lowering for all scalar phis 
No fossil-db changes.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28661>
 2024-04-26 08:39:01 +00:00
Daniel Schürmann
6ec6899bff aco: use SGPR phi lowering for all loop header phis 
No fossil-db changes.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28661>
 2024-04-26 08:39:01 +00:00
Daniel Schürmann
7c01193299 aco: use SGPR phi lowering for uniform phis in divergent merge blocks 
The fossil changes are due to a slightly different register allocation
from a reversed order of phi instructions.

Totals from 1620 (2.04% of 79395) affected shaders: (GFX10.3)

Instrs: 730683 -> 732621 (+0.27%); split: -0.02%, +0.28%
CodeSize: 3888464 -> 3898488 (+0.26%); split: -0.00%, +0.26%
Latency: 3274291 -> 3275549 (+0.04%); split: -0.02%, +0.06%
InvThroughput: 606625 -> 606661 (+0.01%); split: -0.00%, +0.01%
VClause: 9541 -> 9538 (-0.03%)
SClause: 17296 -> 17272 (-0.14%); split: -0.16%, +0.02%
Copies: 81392 -> 83231 (+2.26%); split: -0.17%, +2.43%
Branches: 27023 -> 27020 (-0.01%); split: -0.03%, +0.02%
VALU: 383380 -> 382749 (-0.16%)
SALU: 160895 -> 163369 (+1.54%); split: -0.03%, +1.57%
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28661>
 2024-04-26 08:39:01 +00:00
Daniel Schürmann
9ab5e7fe5d aco/lower_phis: implement SGPR phi lowering 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28661>
 2024-04-26 08:39:01 +00:00
Daniel Schürmann
f2d32e1c13 aco/lower_phis: generalize init_state() so that it works with any scalar phis 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28661>
 2024-04-26 08:39:01 +00:00
Daniel Schürmann
55130069b8 aco/vn: copy-propagate trivial phis 
Totals from 154 (0.19% of 79395) affected shaders: (GFX11)

Instrs: 102420 -> 101702 (-0.70%); split: -0.71%, +0.01%
CodeSize: 534060 -> 530620 (-0.64%); split: -0.65%, +0.01%
Latency: 560180 -> 559723 (-0.08%); split: -0.10%, +0.01%
InvThroughput: 62769 -> 61708 (-1.69%); split: -1.72%, +0.03%
Copies: 6929 -> 6260 (-9.66%); split: -9.68%, +0.03%
Branches: 1636 -> 1609 (-1.65%)
PreVGPRs: 5913 -> 5906 (-0.12%)
VALU: 52681 -> 52012 (-1.27%); split: -1.27%, +0.00%
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28661>
 2024-04-26 08:39:01 +00:00
Daniel Schürmann
6e3446422f aco: introduce aco_opcode::p_boolean_phi 
This opcode is only used during instruction selection and
immediately lowered to linear phis afterwards.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28661>
 2024-04-26 08:39:01 +00:00
Daniel Schürmann
3b832fe2ab aco/lower_phis: simplify check for uniform predecessors 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28661>
 2024-04-26 08:39:01 +00:00
Konstantin Seurer
d6c9b1d03f radv: Handle all dependencies of CmdWaitEvents2 
The spec describes pDependencyInfos as an array with eventCount elements.

cc: mesa-stable

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10579
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28896>
 2024-04-26 08:09:22 +00:00
Samuel Pitoiset
7c0b73e0aa radv/rt: rework the helper that hashes a ray tracing pipeline 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28860>
 2024-04-26 07:40:09 +00:00
Samuel Pitoiset
58fb6db649 radv/rt: pass radv_ray_tracing_state_key to radv_rt_pipeline_compile() 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28860>
 2024-04-26 07:40:09 +00:00
Samuel Pitoiset
7be635719c radv/rt: add radv_ray_tracing_state_key 
This struct contains all information for compiling a pipeline
(stages, stage keys and groups). It will be used to generate a unique
pipeline hash.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28860>
 2024-04-26 07:40:09 +00:00
Colin Marc
ec78cbce4c radv/video: don't truncate frame_num and POC to 32 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28719>
 2024-04-26 06:38:44 +00:00
Timur Kristóf
7809c5f222 ac/nir/tess: Implement packed 16-bit HS->TES I/O using helper macros. 
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28768>
 2024-04-25 23:45:05 +00:00
Timur Kristóf
e92e0bab93 ac/nir/tess: Implement packed 16-bit LS->HS I/O using helper macros. 
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28768>
 2024-04-25 23:45:05 +00:00
Timur Kristóf
67c2016dd5 ac/nir/esgs: Implement packed 16-bit ES->GS I/O using helper macros. 
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28768>
 2024-04-25 23:45:05 +00:00
Timur Kristóf
7bfbff7440 ac/nir: Add helper macros for emitting IO code. 
These are implemented as macros because C doesn't
have templates. They are meant for implementing
properly split packed 16-bit IO stores and loads,
to avoid repetition in the code.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28768>
 2024-04-25 23:45:05 +00:00