Commit graph

116403 commits

Author SHA1 Message Date
Kristian H. Kristensen
0293d14719 freedreno/ir3: Implement primitive layout intrinsics
This implements the load_vs_primitive_stride_ir3,
load_vs_vertex_stride_ir3 and load_primitive_location_ir3 intrinsics,
used for getting the primitive layout strides and locations.

Signed-off-by: Kristian H. Kristensen <hoegsberg@google.com>
2019-10-17 13:43:53 -07:00
Kristian H. Kristensen
8e16fb1528 freedreno/ir3: Implement lowering passes for VS and GS
This introduces two new lowering passes. One to lower VS to explicit
outputs using STLW and one to lower GS to load input using LDLW and
implement the GS specific functionality.

Signed-off-by: Kristian H. Kristensen <hoegsberg@google.com>
2019-10-17 13:43:53 -07:00
Kristian H. Kristensen
8f39985b01 freedreno/ir3: Add has_gs flag to shader key
Since the presence of GS changes how the VS operates we need to track
that in the shader key.

Signed-off-by: Kristian H. Kristensen <hoegsberg@google.com>
2019-10-17 13:43:53 -07:00
Kristian H. Kristensen
2703844cb3 freedreno/a6xx: Add missing adjacency primitives to table
Signed-off-by: Kristian H. Kristensen <hoegsberg@google.com>
2019-10-17 13:43:53 -07:00
Kristian H. Kristensen
0324706764 freedreno/ir3: Add intrinsics that map to LDLW/STLW
These intrinsics will let us do all the offset calculations in nir,
which is nicer to work with and lets nir_opt_algebraic eat it all up.

Signed-off-by: Kristian H. Kristensen <hoegsberg@google.com>
2019-10-17 13:43:53 -07:00
Kristian H. Kristensen
436d125adf freedreno/ir3: Add new LDLW/STLW instructions
These access memory used for passing data between geometry stages.

Signed-off-by: Kristian H. Kristensen <hoegsberg@google.com>
2019-10-17 13:43:53 -07:00
Kristian H. Kristensen
956d319446 freedreno/ir3: Extend RA with mechanism for pre-coloring registers
We'll need to pre-color certain input registers betwee VS and GS
shaders.

Signed-off-by: Kristian H. Kristensen <hoegsberg@google.com>
2019-10-17 13:43:53 -07:00
Kristian H. Kristensen
0b6625d825 freedreno/ir3: Use third register for offset for LDL and LDLV
Before, offset held the offset, which can be either immediate or a
register.  Use a third register to hold the offset so that we can use
a register.

Signed-off-by: Kristian H. Kristensen <hoegsberg@google.com>
2019-10-17 13:43:53 -07:00
Kristian H. Kristensen
3a93e60e7b freedreno/ir3: Add support for CHSH and CHMASK instructions
Just add the constructors for now and special case similar to END so
we don't remove them.

Signed-off-by: Kristian H. Kristensen <hoegsberg@google.com>
2019-10-17 13:43:53 -07:00
Kristian H. Kristensen
f335a6663d freedreno/a6xx: Trim a few regs from fd6_emit_restore()
We know what these do an either write them in the program stateobj or
don't need to write them.

Signed-off-by: Kristian H. Kristensen <hoegsberg@google.com>
2019-10-17 13:43:53 -07:00
Kristian H. Kristensen
610c8c938e freedreno/registers: Update with GS, HS and DS registers
Signed-off-by: Kristian H. Kristensen <hoegsberg@google.com>
2019-10-17 13:43:53 -07:00
Eric Anholt
628ed1bbd5 freedreno/ci: Ban texsubimage2d_pbo.r16ui_2d, due to two flakes reported.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Daniel Stone <daniels@collabora.com>
2019-10-17 20:32:46 +00:00
Marek Olšák
12d92714e9 st/mesa: silence a warning in st_nir_lower_tex_src_plane
trivial
2019-10-17 16:07:26 -04:00
Marek Olšák
3ed1dd3d42 gallium/u_blitter: remove an unused variable
trivial
2019-10-17 16:07:02 -04:00
Marek Olšák
9aa5b348de radeonsi: recreate aux_context after a GPU reset
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
2019-10-17 14:56:26 -04:00
Marek Olšák
438ede3ca3 radeonsi: call the reset callback if get_device_reset_status returns a failure
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
2019-10-17 14:56:24 -04:00
Marek Olšák
93707457b6 st/mesa: call the reset callback if glGetGraphicsResetStatus returns a failure
so that we immediately set the no-op dispatch

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
2019-10-17 14:56:23 -04:00
Caio Marcelo de Oliveira Filho
c847bfaaf5 intel/fs/gen12: Add tests for scoreboard pass
Tests the combinations of cases of RAW, WAW and WAR hazards involving
both inorder and outoforder instructions.  Also tests that
dependencies combine and propagate correctly through control
flow (loops and conditionals).

v2: Add an extra test illustrating that the non-logical CFG edge
    between then-block and else-block is being taking into
    account.  (Curro)

Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2019-10-17 10:02:35 -07:00
Daniel Schürmann
4b458b3e8f aco: don't combine minmax3 if there is a neg or abs modifier in between
This fixes a graphical corruption in HotS.
No pipelinedb changes other than that.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
2019-10-17 16:21:19 +00:00
Roland Scheidegger
045f05a2f6 gallivm: Fix saturated signed psub/padd intrinsics on llvm 8
LLVM 8 did remove both the signed and unsigned sse2/avx intrinsics in
the end, and provide arch-independent llvm intrinsics instead.
Fixes a crash when using snorm framebuffers (tested with piglit
arb_color_buffer_float-render GL_RGBA8_SNORM -auto).

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
CC: <mesa-stable@lists.freedesktop.org>
2019-10-17 17:42:16 +02:00
Samuel Pitoiset
c644644c65 radv: fix DCC fast clear code for intensity formats (correctly)
Previous fix was pretty bogus.

This fixes a rendering regression with Nier (minimap too large).

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/1943
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/1952
Fixes: ea92273cea ("radv: fix DCC fast clear code for intensity formats")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2019-10-17 15:29:43 +02:00
Tomeu Vizoso
82f18b713a panfrost: Keep track of active BOs
If two jobs use the same GEM object at the same time, the job that
finishes first will (previous to this commit) close the GEM object, even
if there's a job still referencing it.

To prevent this, have all jobs use the same panfrost_bo for a given GEM
object, so it's only closed once the last job is done with it.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Rohan Garg <rohan.garg@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-10-17 14:33:59 +02:00
Karol Herbst
730f06a44d nv50/ir: remove DUMMY edge type
it was never used

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2019-10-17 14:00:50 +02:00
James Xiong
023282a4f6 gallium: do not increase ref count of the new throttle fence
A new throttle fence was initialized to 1, and increased by 1
again when it's put in drawable->throttle_fence; the ref was
decreased by 1 when it's removed from drawable->throttle_fence,
and never reached to 0, caused leak.

Fixes: ff77bf5cbf7 ("gallium: simplify throttle implementation")
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/1949

Signed-off-by: James Xiong <james.xiong@intel.com>
Reported-by: Florian Wesch <fw@info-beamer.com>
Reviewed-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com>
2019-10-17 10:18:07 +00:00
Erik Faye-Lund
e8095f2af0 nir: drop unused alpha_ref_float
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2019-10-17 10:41:36 +02:00
Erik Faye-Lund
5af272b474 nir: drop support for using load_alpha_ref_float
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2019-10-17 10:41:36 +02:00
Erik Faye-Lund
9d0523b569 v3d: do not report alpha-test as supported
This triggers lowering in the state-tracker, which makes things a bit
simpler.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2019-10-17 10:41:36 +02:00
Erik Faye-Lund
a79b93269c vc4: do not report alpha-test as supported
This triggers lowering in the state-tracker, which makes things a bit
simpler.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2019-10-17 10:41:36 +02:00
Erik Faye-Lund
2da792d398 panfrost: do not report alpha-test as supported
This triggers lowering in the state-tracker, which makes things a bit
simpler.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2019-10-17 10:41:36 +02:00
Erik Faye-Lund
3298aedd6e mesa/st: support lowering user-clip-planes automatically
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2019-10-17 10:41:36 +02:00
Erik Faye-Lund
439f499591 mesa/program: support referencing the clip-space clip-plane state
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2019-10-17 10:41:36 +02:00
Erik Faye-Lund
71c0dcf266 nir: support feeding state to nir_lower_clip_[vg]s
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2019-10-17 10:41:36 +02:00
Erik Faye-Lund
eb3047c094 nir: support lowering clipdist to arrays
This allows us to make sure clipdist is emitted as a scalar array rather
than two vec4s. This matches SPIR-V semantics, and will be useful for
Zink.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2019-10-17 10:41:36 +02:00
Erik Faye-Lund
28543f1640 mesa/gallium: automatically lower two-sided lighting
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2019-10-17 10:41:36 +02:00
Erik Faye-Lund
011d692a52 nir: support derefs in two-sided lighting lowering
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2019-10-17 10:41:36 +02:00
Erik Faye-Lund
3b4fc2401b mesa/gallium: automatically lower point-size
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2019-10-17 10:41:36 +02:00
Erik Faye-Lund
878c94288a nir: add lowering-pass for point-size mov
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2019-10-17 10:41:36 +02:00
Erik Faye-Lund
b786738454 st/mesa: move point_size_per_vertex-logic to helper
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2019-10-17 10:41:36 +02:00
Erik Faye-Lund
b1c4c4c7f5 mesa/gallium: automatically lower alpha-testing
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2019-10-17 10:41:36 +02:00
Erik Faye-Lund
6d7e02e37d nir: allow passing alpha-ref state to lowering-code
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2019-10-17 10:41:36 +02:00
Erik Faye-Lund
fdc4450c28 mesa: expose alpha-ref as a state-variable
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2019-10-17 10:41:36 +02:00
Dave Airlie
cce3ad166a st/mesa: handling lower flatshading for NIR drivers.
This uses the NIR pass to lower flatshading when the driver
requests it.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2019-10-17 10:41:36 +02:00
Dave Airlie
731260de7d gallium: add flatshade lowering capability
This allows the driver to request flatshade lowering.
(NIR drivers only so far).

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2019-10-17 10:41:36 +02:00
Dave Airlie
dc91a02a72 nir: add a pass to lower flat shading.
This takes any color or backcolor that has unspecified
shading and converts it to flat shading.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2019-10-17 10:41:36 +02:00
Erik Faye-Lund
26c6640835 gallium/u_blitter: set a more sane viewport-state
This actually corresponds to legal GL depth-ranges, because depth-clear
values are always in the 0..1 range in OpenGL.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2019-10-17 09:26:25 +02:00
Marek Olšák
4857d695f5 st/mesa: reorder and document code in st_translate_vertex_program
move the TGSI code after the ARB_vp code

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2019-10-16 20:10:47 -04:00
Marek Olšák
5d0630e504 st/mesa: call prog_to_nir sooner for ARB_fp
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2019-10-16 20:10:47 -04:00
Marek Olšák
f54dcaf232 st/mesa: don't call translate_*_program functions for NIR
move the initializaton to st_link_nir

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2019-10-16 20:10:47 -04:00
Marek Olšák
f86b28dfdc st/mesa: finalize NIR after shader variant passes for TCS/TES/GS/CS
Same as VS and FS.

This might fix vertex color clamping.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2019-10-16 20:10:47 -04:00
Marek Olšák
45378689e0 st/mesa: unify transform feedback info translation code
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2019-10-16 20:10:47 -04:00