Commit graph

107440 commits

Author SHA1 Message Date
Samuel Pitoiset
015e8974ab radv: do not need to force emit the TCS regs on Vega20
This chip doesn't need the fixup. This fixes a bunch of
dEQP-VK.tessellation tests and avoid random GPU hangs.

Cc: "19.0" "19.1" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
(cherry picked from commit 6162543999)
2019-05-08 16:40:18 -07:00
Dave Airlie
227df9464e r600: reset tex array override even when no view bound
If no view is bound we still should reset the override to 0
and array mode.

This should fix misrendering in firefox WebRender since
the pbo sampler was removed.

Fixes: 1250383e36 (st/mesa: remove sampler associated with buffer texture in pbo logic)
(cherry picked from commit e2fecf57e3)
2019-05-08 16:40:18 -07:00
Erik Faye-Lund
5bebe2a00d softpipe: setup pixel_offset for all primitive types
If we don't update this for all primitive-types, we end up rendering
slightly offset points and lines up until the point where the first
triangle gets drawn. This is obviously not correct, and violates
OpenGL's repeatability rule.

Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Fixes: ca9c413647 ("softpipe: Respect gl_rasterization_rules in
       primitive setup.")
Reviewed-By: Gert Wollny <gert.wollny@collabora.com>
(cherry picked from commit f753ac355e)
2019-05-08 16:40:18 -07:00
Andrii Simiklit
4b0f059938 egl: return correct error code for a case req ver < 3 with forward-compatible
The EGL_KHR_create_context spec says:
   "If an OpenGL context is requested and the values for attributes
    EGL_CONTEXT_MAJOR_VERSION_KHR and EGL_CONTEXT_MINOR_VERSION_KHR,
    when considered together with the value for attribute
    EGL_CONTEXT_OPENGL_FORWARD_COMPATIBLE_BIT_KHR, specify an OpenGL
    version and feature set that are not defined, than an
    EGL_BAD_MATCH error is generated."

This case is already correctly handled a bit below in
the same source file.
The correct handling was added by commit: 63beb3df

Reported-by: Ian Romanick <idr@freedesktop.org>
Here: https://bugzilla.freedesktop.org/show_bug.cgi?id=92552#c9
Fixes: 11cabc45b7 "egl: rework handling EGL_CONTEXT_FLAGS"
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Signed-off-by: Andrii Simiklit <andrii.simiklit@globallogic.com>
(cherry picked from commit 5c581b3dd6)
2019-05-08 16:40:18 -07:00
Axel Davy
fabaae4d8d st/nine: Fix D3DWindowBuffer_release for old wine nine support
No-one reported bugs for that, but is seems
c442dd7890
and previous commits used APIs not defined until
nine minor version 3.
This patch should prevent crash in this case.

Also turn off the resize feature in this case,
as we won't prevent a buffer leak anymore.

Cc: "19.0" mesa-stable@lists.freedesktop.org
Signed-off-by: Axel Davy <davyaxel0@gmail.com>
(cherry picked from commit 64a45ba7f8)
2019-05-08 16:40:18 -07:00
Ian Romanick
6e710c1fb4 mesa: Add missing display list support for GL_FOG_COORDINATE_SOURCE
Fixes: fe5d67d95f ("Implement EXT_fog_coord and EXT_secondary_color.")
Reviewed-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Cc: Brian Paul <brianp@vmware.com>
(cherry picked from commit bfc6486819)
2019-05-08 16:40:18 -07:00
Alejandro Piñeiro
3fe72ca214 docs: document MESA_GLSL=errors keyword
Added with commit 0161691f35, still checked on shaderapi.c
_mesa_get_shader_flag method.

Fixes: 0161691f35 "mesa: add GLSL_REPORT_ERRORS debug flag"
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
(cherry picked from commit 9b6a00e66e)
2019-05-08 16:40:18 -07:00
Ross Burton
05c7d8c551 Revert "meson: drop GLESv1 .so version back to 1.0.0"
This patch claimed that the autotools build generates libGLESv1_CM.so.1.0.0, but
it doesn't:

es1api_libGLESv1_CM_la_LDFLAGS = \
        -no-undefined \
        -version-number 1:1 \
        $(GC_SECTIONS) \
        $(LD_NO_UNDEFINED)

Revert commit cc15460e18 to ensure that the
autotools and meson builds produce the same libraries.

Fixes: cc15460e18 "meson: drop GLESv1 .so version back to 1.0.0"
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
(cherry picked from commit 1c1efa4ca9)
2019-05-08 16:40:18 -07:00
Juan A. Suarez Romero
96fe97d133 radv: enable descriptor indexing capabilities
This enables the remaining capabilities in SPV_EXT_descriptor_indexing.

Fixes: 0e10790558 "radv: Enable VK_EXT_descriptor_indexing."

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
(cherry picked from commit 06c9d7f9f9)
2019-05-08 16:40:18 -07:00
Juan A. Suarez Romero
f807986a38 spirv: add missing SPV_EXT_descriptor_indexing capabilities
Add ShaderNonUniformEXT, UniformBufferArrayNonUniformIndexingEXT,
SampledImageArrayNonUniformIndexingEXT,
StorageBufferArrayNonUniformIndexingEXT,
StorageImageArrayNonUniformIndexingEXT,
InputAttachmentArrayNonUniformIndexingEXT,
UniformTexelBufferArrayNonUniformIndexingEXT and
StorageTexelBufferArrayNonUniformIndexingEXT capabilities.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
(cherry picked from commit bbbe00a101)
2019-05-08 16:40:18 -07:00
Hal Gentz
b66205a140 glx: Fix synthetic error generation in __glXSendError
To quote Uli Schlachter, who understands this stuff more than I do:

>   The function __glXSendError() in mesa's src/glx/glx_error.c invents an X11
> protocol error out of thin air. For the sequence number it uses dpy->request.
> This is the sequence number of the last request that was sent. _XError() will
> then update dpy->last_request_read based on the sequence number of the error
> that just "came in".
>
>   If now another something comes in with a sequence number less than
> dpy->last_request_read, since sequence numbers are monotonically increasing,
> widen() will incorrectly add 1<<32 to the sequence number and things might go
> downhill afterwards.

`__glXSendErrorForXcb` was also patched, as that's the function that
`glXCreateContextAttribsARB` actually uses.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99781
Cc: mesa-stable@lists.freedesktop.org
Fixes: ad503c41 'apple: Initial import of libGL for OSX from AppleSGLX svn repository'
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Signed-off-by: Hal Gentz <zegentzy@protonmail.com>
(cherry picked from commit e91ee763c3)
2019-05-08 16:40:18 -07:00
Dylan Baker
e416ce522c cherry-ignore: Add more backported patches 2019-05-08 16:40:18 -07:00
Jason Ekstrand
c8dbe93b0a anv/descriptor_set: Destroy sets before pool finalization
Fixes: 105002bd2d "anv: destroy descriptor sets when pool gets..."
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2019-05-08 16:40:18 -07:00
Tapani Pälli
fa1bbc00a6 anv: expose VK_EXT_queue_family_foreign on Android
VK_ANDROID_external_memory_android_hardware_buffer requires this
extension. It is safe to enable it since currently aux usage is
disabled for ahw buffers.

Fixes following dEQP extension dependency test on Android:
   dEQP-VK.api.info.device#extensions

Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
(cherry picked from commit 376c3e8f87)
2019-05-08 16:40:18 -07:00
Samuel Pitoiset
cd9e4fbec1 radv: add missing VEGA20 chip in radv_get_device_name()
Otherwise it returns "AMD RADV unknown".

Cc: 19.0 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
(cherry picked from commit 07745f9494)
2019-05-08 16:40:18 -07:00
Emil Velikov
d19148b7d9 vulkan/wsi: don't use DUMB_CLOSE for normal GEM handles
Currently we get normal GEM handles from PrimeFDToHandle, yet we close
then with DUMB_CLOSE. Use GEM_CLOSE instead.

Fixes: da997ebec9 ("vulkan: Add KHR_display extension using DRM [v10]")
Cc: Jason Ekstrand <jason@jlekstrand.net>
Cc: Keith Packard <keithp@keithp.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit bd0c4e360d)
2019-05-08 16:40:18 -07:00
Emil Velikov
37a3a80c2e vulkan/wsi: check if the display_fd given is master
As effectively required by the extension, we need to ensure we're master

Currently drivers employ vendor specific solutions, which check if the
device behind the fd is capable*, yet none of them do the master check.

*In the radv case, if acceleration is available.

Instead of duplicating the check in each driver, keep it where it's
needed and used.

Note this copies libdrm's drmIsMaster() to avoid depending on bleeding
edge version of the library.

v2: set the fd to -1 if not master (Bas)

Fixes: da997ebec9 ("vulkan: Add KHR_display extension using DRM [v10]")
Cc: Andres Rodriguez <andresx7@gmail.com>
Cc: Jason Ekstrand <jason@jlekstrand.net>
Cc: Keith Packard <keithp@keithp.com>
Reported-by: Andres Rodriguez <andresx7@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit c962a78f18)
2019-05-08 16:40:18 -07:00
Dylan Baker
ef1f065f0a cherry-ignore: Add a patch that was manually backported 2019-05-08 16:40:18 -07:00
Kenneth Graunke
d81cf30f95 i965: Ignore uniform storage for samplers or images, use binding info
gl_nir_lower_samplers_as_deref creates new top level sampler and image
uniforms which have been split from structure uniforms.  i965 assumed
that it could walk through gl_uniform_storage slots by starting at
var->data.location and walking forward based on a simple slot count.
This assumed that structure types were walked in a particular order.

With samplers and images split out of structures, it becomes impossible
to assign meaningful locations.  Consider:

   struct S {
      sampler2D a;
      sampler2D b;
   } s[2];

The gl_uniform_storage locations for these follow this map:

   0 => a[0], 1 => b[0], 2 => a[0], 3 => b[0].

But the new split variables look like:

   sampler2D lowered_a[2];
   sampler2D lowered_b[2];

and there is no way to know that there's effectively a stride to get to
the location for successive elements of a[] or b[].  So, working with
location becomes effectively impossible.

Ultimately, the point of looking at uniform storage was to pull out the
bindings from the opaque index fields.  gl_nir_lower_samplers_as_derefs
can obtain this information while doing the splitting, however, and sets
up var->data.binding to have the desired values.

We move gl_nir_lower_samplers before brw_nir_lower_image_load_store so
gl_nir_lower_samplers_as_derefs has the opportunity to set proper image
bindings.  Then, we make the uniform handling code skip sampler(-array)
variables, and handle image param setup based on var->data.binding.

Fixes Piglit tests/spec/glsl-1.10/execution/samplers/uniform-struct,
this time without regressing dEQP-GLES2.functional.uniform_api.random.3.

Fixes: f003859f97 nir: Make gl_nir_lower_samplers use gl_nir_lower_samplers_as_deref

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
(backported from commit 6981069fc8,
 without prog_to_nir using derefs or texture bitfield gathering)
2019-05-08 16:40:18 -07:00
Kenneth Graunke
6b74d33928 glsl: Don't look at sampler uniform storage for internal vars
Passes like nir_lower_drawpixels add additional sampler variables,
and set an explicit binding which never changes.  These extra samplers
don't have proper uniform storage associated with them, and there is no
way to update bindings via the API.  So, for any 'hidden' variables,
just trust that there's an explicit binding set.

Reviewed-by: Eric Anholt <eric@anholt.net>
(cherry picked from commit 529a0711c1)
2019-05-08 16:40:18 -07:00
Kenneth Graunke
06ca5c0a64 glsl: Allow gl_nir_lower_samplers*() without a gl_shader_program
I would like to be able to run gl_nir_lower_samplers() to turn texture
and sampler variable dereferences into indexes and offsets, even for
ARB programs, and built-in shaders.  This would make sampler handling
more consistent across the various types of shaders.

For GLSL programs, the gl_nir_lower_samplers_as_deref() pass looks up
the variable bindings in the shader program's uniform storage.  But
ARB programs and built-in shaders don't have a gl_shader_program, and
uniform storage doesn't exist.  In this case, we simply skip that
lookup, and trust var->data.binding to be set correctly by whoever
created the shader.

Reviewed-by: Eric Anholt <eric@anholt.net>
(cherry picked from commit d34e434989)
2019-05-08 16:40:18 -07:00
Marek Olšák
1a3478dc56 radeonsi/gfx9: rework the gfx9 scissor bug workaround (v2)
Needed to track context rolls caused by streamout and ACQUIRE_MEM.
ACQUIRE_MEM can occur outside of draw calls.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110355

v2: squashed patches and done more rework

Cc: 19.0 <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 440135e5a0)
Conflicts resolved by Dylan
2019-05-08 16:40:18 -07:00
Nicolai Hähnle
9f1d5d63ee radeonsi: add si_debug_options for convenient adding/removing of options
Move the definition of radeonsi_clear_db_cache_before_clear there,
as well as radeonsi_enable_nir.

This removes the AMD_DEBUG=nir option.

We currently still have two places for options: the driconf machinery
and AMD_DEBUG/R600_DEBUG. If we are to have a single place for options,
then the driconf machinery should be preferred since it's more flexible.

The only downside of the driconf machinery was that adding new options
was quite inconvenient. With this change, a simple boolean option can
be added with a single line of code, same as for AMD_DEBUG.

One technical limitation of this particular implementation is that while
almost all driconf features are available, the translation machinery doesn't
pick up the description strings for options added in si_debvug_options. In
practice, translations haven't been provided anyway, and this is intended
for developer options, so I'm not too worried. It could always be added
later if anybody really cares.

v2:
- use bool instead of uint8_t for options
- si_debug_options.inc -> si_debug_options.h

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
(cherry picked from commit 8bef4df196)
autotools dist fixed by Dylan (not needed in master)
2019-05-08 16:40:10 -07:00
Marek Olšák
c15519b882 radeonsi/gfx9: set that window_rectangles always roll the context
Cc: 19.0 <mesa-stable@lists.freedesktop.org>
(cherry picked from commit bc0d924507)
2019-04-25 13:38:50 -07:00
Timothy Arceri
a038a271f9 nir: fix nir_remove_unused_varyings()
We were only setting the used mask for the first component of a
varying. Since the linking opts split vectors into scalars this
has mostly worked ok.

However this causes an issue where for example if we split a
struct on one side of the interface but not the other, then we
can possibly end up removing the first components on the side
that was split and then incorrectly remove the whole struct
on the other side of the varying.

With this change we simply mark all 4 components for each slot
used by a struct. We could possibly make this more fine gained
but that would require a more complex change.

This fixes a bug in Strange Brigade on RADV when tessellation
is enabled, all credit goes to Samuel Pitoiset for tracking down
the cause of the bug.

Fixes: f1eb5e6399 ("nir: add component level support to remove_unused_io_vars()")

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
(cherry picked from commit b155f74d7b)
Conflicts resolved by Dylan
2019-04-25 13:38:10 -07:00
Jon Turney
a8aa18aa23 meson: Force '.so' extension for DRI drivers
DRI driver loadable modules are always installed with
install_megadriver.py with names ending with '.so', irrespective of
platform.

Force the name the loadable module is built with to match, so
install_megadriver.py doesn't spin trying to remove non-existent
symlinks.

Fixes: c77acc3c "meson: remove meson-created megadrivers symlinks"
(cherry picked from commit 5d310015c5)
2019-04-25 13:24:26 -07:00
Ian Romanick
aa340450a0 glsl: Silence may unused parameter warnings in glsl/ir.h
Every file that included glsl/ir.h had a warning like:

src/compiler/glsl/ir.h: In member function ‘virtual bool ir_rvalue::is_lvalue(const _mesa_glsl_parse_state*) const’:
src/compiler/glsl/ir.h:236:64: warning: unused parameter ‘state’ [-Wunused-parameter]
    virtual bool is_lvalue(const struct _mesa_glsl_parse_state *state = NULL) const
                                                                ^
Cc: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Fixes: fa4ebf6b8d ("glsl: add _mesa_glsl_parse_state object to is_lvalue()")
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>

(cherry picked from commit 3b087f668f)
2019-04-24 15:28:39 -07:00
Caio Marcelo de Oliveira Filho
d4bbf9f838 spirv: Handle SpvOpDecorateId
This operation decorate with an Id instead of a Literal or String.

It is used by HlslCounterBufferGOOGLE (provided by
SPV_GOOGLE_hlsl_functionality1).  Even if we don't do anything with
that decoration, we must be able to parse SPIR-V that uses it.

Fixes: 891886da2f "spirv: Add no-op support for VK_GOOGLE_hlsl_functionality1"
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
(cherry picked from commit 7e2684ce01)
2019-04-24 15:28:39 -07:00
Lionel Landwerlin
35970dea11 anv: fix argument name for vkCmdEndQuery
Doesn't fix anything but it's not the right function prototype.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 673f33c77d ("anv: Implement CmdBegin/EndQueryIndexed")
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
(cherry picked from commit 0fb0058f18)
2019-04-24 15:28:39 -07:00
Lionel Landwerlin
08f3ce4c7d anv: leave the top 4Gb of the high heap VMA unused
In 628c9ca908 I forgot to apply the same -4Gb of the high address
of the high heap VMA. This was previously computed in the
HIGH_HEAP_MAX_ADDRESS.

Many thanks to James for pointing this out.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reported-by: Xiong, James <james.xiong@intel.com>
Fixes: 628c9ca908 ("anv: store heap address bounds when initializing physical device")
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
(cherry picked from commit 9e7b0988d6)
2019-04-25 05:22:46 +08:00
Lionel Landwerlin
3a90f8df50 anv: store heap address bounds when initializing physical device
We can then reuse those bounds to initialize the VMA heaps at logical
device creation.

This fixes an issue on EHL which has only 36bits of VMA. We were
incorrectly using the fixed 48bits upper bound to initialize the
logical device heap, resulting in addresses beyong the device's
limits.

v2: Don't confuse heap size (limited by system memory) and VMA size
   (limited by number of addressing bits the platform has)

v3: Fix low heap vma_size :( (Lionel)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reported-by: James Xiong <james.xiong@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com> (v1)
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> (v2)
(cherry picked from commit 628c9ca908)
2019-04-25 05:22:46 +08:00
Dylan Baker
f163900f7c docs: Add SHA256 sums for mesa 19.0.3 2019-04-24 10:44:27 -07:00
Dylan Baker
c8cdee5dc3 docs: add relnotes for 19.0.3 2019-04-24 10:39:04 -07:00
Dylan Baker
5cb685a3b8 Bump version for 19.0.3 2019-04-24 10:36:18 -07:00
Marek Olšák
44ddb884c8 radeonsi: use CP DMA for the null const buffer clear on CIK
This is a workaround for a thread deadlock that I have no idea
why it occurs.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108879
Fixes: 9b331e462e

Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
(cherry picked from commit b58e5fb6f3)
2019-04-24 08:50:50 -07:00
Samuel Pitoiset
ba1bf6c3ea radv: do not load vertex attributes that are not provided by the pipeline
Per the Vulkan spec this is definitely invalid but X4 Foundations
does that and it ends up by hanging the GPU.

Found while enabling validation layers with the game. The issue
will be reported to the developers.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
(cherry picked from commit 381e38aaaa47c5aa38bc4f504b325fb68b7caea8)
2019-04-24 08:50:34 -07:00
Kenneth Graunke
f223fb98e9 Revert "glsl: Set location on structure-split sampler uniform variables"
This reverts commit 9e0c744f07, which
regressed dEQP-GLES2.functional.uniform_api.random.3.  It turns out
that the newly produced location is meaningless and impossible to
consume by drivers that want to look at gl_uniform_storage, so it's
probably better to leave it unset (0) than a number that looks usable.

Leave a tombstone^Wcomment to discourage the next person from making
the obvious looking fix.

See the next commit for a longer description of the problem.

This breaks tests/spec/glsl-1.10/execution/samplers/uniform-struct
on i965, which was originally fixed by the revert.  The next commit
will fix it again.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
(cherry picked from commit 47303b466c)
2019-04-23 09:18:20 -07:00
Lubomir Rintel
91671ec1f4 gallivm: disable NEON instructions if they are not supported
The LLVM project made some questionable decisions about defaults for
armv7 (e.g. they enable NEON that is not there on NVIDIA and Marvell
platforms).

On top of that, getHostCPUFeatures() doesn't disable missing machine
attributes. Finally, -neon alone is not sufficient to disable emmision
of NEON instructions.

Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
(cherry picked from commit e983a975c6)
2019-04-23 09:17:58 -07:00
Lubomir Rintel
b509068164 gallivm: guess CPU features also on ARM
getHostCPUFeatures() is also available on ARM, for even longer time than
for x86. Use it -- it potentially enables instructions that may speed
things up.

Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Cc: <mesa-stable@lists.freedesktop.org>
Closes: https://gitlab.freedesktop.org/mesa/mesa/merge_requests/518
Reviewed-by: Matt Turner <mattst88@gmail.com>
(cherry picked from commit bc6bfc861f)
2019-04-23 09:17:51 -07:00
Jason Ekstrand
2397f5d99d anv: Add a #define for the max binding table size
This also fixes a bug where we mis-calculate maximum binding table sizes
and may return true in vkGetDescriptorSetLayoutSupport even for sets too
large to fit in a binding table.

Fixes: ddc4069122 "anv: Implement VK_KHR_maintenance3"
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
(cherry picked from commit a5a0dc08f1)
2019-04-22 09:06:44 -07:00
Lionel Landwerlin
ac1ffeab1d intel/devinfo: fix missing num_thread_per_eu on ICL
There was an assumption that num_thread_per_eu would be set in the
Gen8 features. Since this is mostly the same of all gen8->11 (except
GEN9_LP that overwrites it) let's just factor it out.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable@lists.freedesktop.org
Acked-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Anuj Phogat anuj.phogat@gmail.com
(cherry picked from commit 773e6aa9fd)
2019-04-22 09:06:38 -07:00
Eric Anholt
229c4abde3 nir: Fix deref offset calculation for structs.
We were calcuating the offset for the field within the struct, and just
dropping it on the floor.  Fixes a regression in
KHR-GLES3.shaders.struct.local.nested_struct_array_dynamic_index_fragment
and a few of its friends since the scratch lowering commit.

Fixes: e8e159e9df ("nir/deref: Add helpers for getting offsets")
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
(cherry picked from commit 9ac5ec2f90)
2019-04-22 09:06:32 -07:00
Samuel Pitoiset
b5ea4378c3 ac/nir: only use the new raw/struct image atomic intrinsics with LLVM 9+
They are buggy with LLVM 8 because they weren't marked as source
of divergence, see r358579.

Fixes: dd0172e865 ("radv: Use structured intrinsics instead of indexing workaround for GFX9.")"
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
(cherry picked from commit 31164cf5f7)
2019-04-22 09:06:26 -07:00
Lionel Landwerlin
23abb7d310 anv: fix uninitialized pthread cond clock domain
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 843775bab7 ("anv: Rework fences")
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
(cherry picked from commit dfd79079da)
2019-04-18 16:18:46 -07:00
Juan A. Suarez Romero
32e08b2397 meson: Add dependency on genxml to anvil genfiles
This fixes a race condition where anv_gen_files are executed before
genxml files, which causes a build failure

v2: add dependency on idep_genxml (Lionel)

Fixes: d1992255bb
       ("meson: Add build Intel "anv" vulkan driver")

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
(cherry picked from commit b74e605cf4)
2019-04-17 12:47:45 -07:00
Danylo Piliaiev
bde36e0736 intel/compiler: Do not reswizzle dst if instruction writes to flag register
If we write to the flag register changing the swizzle would change
what channels are written to the flag register.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110201
Fixes: 4cd1a0be
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: <ian.d.romanick@intel.com>
(cherry picked from commit 04508f57d1)
2019-04-16 09:43:38 -07:00
Chia-I Wu
3400359432 virgl: fix fence fd version check
Fixes: d1a1c21e76 ("virgl: native fence fd support")

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit c45c889f95)
2019-04-16 09:43:32 -07:00
Roland Scheidegger
ce4b6974cd gallivm: fix bogus assert in get_indirect_index
0 is a valid value as max index, and the code handles it fine. This isn't
commonly seen, as it will only happen with array declarations of size 1.
Fixes piglit tests/shaders/complex-loop-analysis-bug.shader_test

Fixes: a3c898dc97 "gallivm: fix improper clamping of vertex index when fetching gs inputs"
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110441

Reviewed-by: Brian Paul <brianp@vmware.com>
(cherry picked from commit 88e0bbf24a)
2019-04-16 09:43:25 -07:00
Bas Nieuwenhuizen
0ffd4c744d ac: Move has_local_buffers disable to radeonsi.
In radv we had a separate flag to actually use it + an env option
to experimentally use it.

The common code setting has_local_buffers to false of course broke
that experimental option.

Also the "enable on APU" did not make sense for RADV as it is still
disabled by default.

Fixes: b21a4efb55 "radv/winsys: allow local BOs on APUs"
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
(cherry picked from commit af9534b9f3)
2019-04-16 09:43:18 -07:00
Rhys Perry
77dbb70e5c nir,ac/nir: fix cube_face_coord
Seems it was missing the "/ ma + 0.5" and the order was swapped.

Fixes: a1a2a8dfda ('nir: add AMD_gcn_shader extended instructions')
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
(cherry picked from commit 8671cfe2a2)
2019-04-16 09:43:10 -07:00