Commit graph

9365 commits

Author SHA1 Message Date
Felix DeGrood
0130a4f667 anv/blorp: support surf generation for addresses
Already have support for anv_buff. Extended to support addresses.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22178>
2023-04-07 15:51:20 +00:00
Ian Romanick
12e11fa3e4 intel/fs: White space fixes
Trivial

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22299>
2023-04-06 19:07:50 +00:00
Ian Romanick
6dfb7061e0 intel/fs: Preserve meta data more often in brw_nir_move_interpolation_to_top
This pass rarely makes any changes, so work a little harder to preserve
more meta data.

On my Ice Lake laptop (using a locked CPU speed and other measures to
prevent thermal throttling, etc.) using a debugoptimized build, improves
performance of Vulkan CTS "deqp-vk --deqp-case='dEQP-VK.*spir*'" by
-0.2% ± 0.1% (n = 5, pooled s = 0.431885).

v2: Add some parenthesis. Suggested by Lionel.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22299>
2023-04-06 19:07:50 +00:00
Ian Romanick
3037603b70 intel/fs: Linked list micro optimizations in brw_nir_move_interpolation_to_top
Two linked list management changes:

- Use the list head sentinel as the initial cursor. It is, after all, a
  proper node in the list.

- Iterate the list of blocks starting with the second block instead of
  skipping the first block in the loop.

On my Ice Lake laptop (using a locked CPU speed and other measures to
prevent thermal throttling, etc.) using a release build, improves
performance of compiling shaders from batman_arkham_city_goty.foz by
-0.24% ± 0.09% (n = 5, pooled s = 0.324106).

v2: Use nir_cursor instead of direct list manipultion. Suggested by
Lionel.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22299>
2023-04-06 19:07:50 +00:00
Ian Romanick
78ee74de4a intel/compiler: Micro optimize regions_overlap
On my Ice Lake laptop (using a locked CPU speed and other measures to
prevent thermal throttling, etc.) using a release build, improves
performance of compiling shaders from batman_arkham_city_goty.foz by
-1.09% ± 0.084% (n = 5, pooled s = 0.354471)

Reduces the size of a release build by 26k.

   text	   data	    bss	    dec	    hex	filename
23163641 400720	 231360	23795721	16b1809	before/lib64/dri/iris_dri.so
23137264 400720	 231360	23769344	16ab100	after/lib64/dri/iris_dri.so

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22299>
2023-04-06 19:07:50 +00:00
Ian Romanick
7873edee6e intel/fs: Use specialized version of regions_overlap in opt_copy_propagation
Since one of the register must always be either VGRF or FIXED_GRF, much
of regions_overlap and reg_offset can be elided.

On my Ice Lake laptop (using a locked CPU speed and other measures to
prevent thermal throttling, etc.) using a debugoptimized build, improves
performance of Vulkan CTS "deqp-vk --deqp-case='dEQP-VK.*spir*'" by
-0.29% ± 0.097% (n = 5, pooled s = 0.361697).

Using a release build, improves performance of compiling shaders from
batman_arkham_city_goty.foz by -3.3% ± 0.04% (n = 5, pooled s =
0.178312).

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22299>
2023-04-06 19:07:50 +00:00
Ian Romanick
43cb42df7c intel/compiler: Micro optimize inst_is_in_block
This function only exists in builds with assertions, so it only matters
there.

On my Ice Lake laptop (using a locked CPU speed and other measures to
prevent thermal throttling, etc.) using a debugoptimized build, improves
performance of Vulkan CTS "deqp-vk --deqp-case='dEQP-VK.*spir*'" by
-5.2% ± 0.16% (n = 5, pooled s = 0.657887).

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22299>
2023-04-06 19:07:50 +00:00
Ian Romanick
d47f521ee4 intel/compiler: Use NIR_PASS instead of NIR_PASS_V
Reduce debug log spam by only logging the shader if a pass made some
changes. This can also elide some nir_validate calls in debug builds.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22299>
2023-04-06 19:07:50 +00:00
Ian Romanick
fb950a9edf intel/compiler: Remove one overload of backend_instruction::insert_before
The version that takes a list of instructions is not used. I did not do
any archaeology to find out when the last user was removed.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22299>
2023-04-06 19:07:50 +00:00
Tapani Pälli
44053c0947 intel/common: limit the amount of SLM with Wa_14017341140
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22307>
2023-04-06 10:54:47 +00:00
Rohan Garg
e21cca78ea anv,blorp,iris: Set PreferredSLMAllocationSize on gfx125+
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22307>
2023-04-06 10:54:47 +00:00
Rohan Garg
3b6dbf8902 intel/genxml: Add the preferred slm size enum for gen125
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22307>
2023-04-06 10:54:46 +00:00
Anuj Phogat
606a39f9d1 intel/genxml/125: Add preferred SLM allocation size field
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22307>
2023-04-06 10:54:46 +00:00
Emma Anholt
f1ea6c1b40 intel: Always call nir_lower_frexp.
We have NIR lowering for Vulkan, and rely on GLSL's lowering in the
frontend, but this will let us drop the GLSL lowering.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22083>
2023-04-06 02:32:01 +00:00
Jordan Justen
eef7a117a1 intel/compiler: Support fmul_fsign opt for fp64 when int64 isn't supported
MTL support fp64, but not int64. The fsign(double(x))*FOO optimization
would try to use a 64-bit int xor operation to conditionally toggle
the sign bit off the result.

Since this only affects high bit of the result, we can do a 32-bit
move of the low dword, and a 32-bit xor on the high dword.

Fixes dEQP-VK.spirv_assembly.instruction.compute.float_controls.fp64.input_args.modf_denorm_flush_to_zero
on MTL.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22259>
2023-04-05 18:48:21 +00:00
Lionel Landwerlin
e25aee8e34 intel/fs: also allow vec8+ vectorization of load_global_const_block_intel
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21853>
2023-04-05 12:32:56 +00:00
Lionel Landwerlin
a358b97c58 intel/fs: optimize uniform SSBO & shared loads
Using divergence analysis, figure out when SSBO & shared memory loads
are uniform and carry the data only once in register space.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21853>
2023-04-05 12:32:56 +00:00
Lionel Landwerlin
275ad509c1 intel/fs: factor out lsc surface descriptor settings
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21853>
2023-04-05 12:32:56 +00:00
Lionel Landwerlin
76698f3abd intel/fs: copy instruction sources in logical send lowering
Having references to inst->src[X] when you're also modifying
inst->src[X] is a receipe for disaster. Making changes to the lowering
code I've been bitten quite a few times by this take copies of all
sources to do the lowering.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21853>
2023-04-05 12:32:56 +00:00
Lionel Landwerlin
adb8c30436 intel/fs: UNDEF fixup_nomask_control_flow temp register
Ensure that the register's liveness is not expanded to loops.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21853>
2023-04-05 12:32:56 +00:00
Lionel Landwerlin
362a07db3a intel/fs: don't consider fixup_nomask_control_flow SENDs predicate
Those SENDs are still doing a full register write. We just inserted
some predication for a workaround.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21853>
2023-04-05 12:32:56 +00:00
Lionel Landwerlin
34d8bfe65f intel/fs: run VGRF compaction just before max live register accounting
There are a number of instances of the dead code elimination pass that
could reduce the count. For some reason this also seems to affect
register allocation itself.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21853>
2023-04-05 12:32:56 +00:00
Marcin Ślusarz
554b28d0b1 anv: ignore structure types handled in vk_device_memory_create
Without that we get warning from anv_debug_ignored_stype, called in
the default case.

Fixes: 4b0b75c27a ("anv: Use the new vk_device_memory base struct")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22295>
2023-04-05 11:53:29 +00:00
Sagar Ghuge
10fc12fd17 anv: Drop dead code that sets the L3BypassDisable field
These helper functions will only get invoked for GFX < 11 and the
L3BypassDisable field is present starting from GFX12+.

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22275>
2023-04-04 17:39:20 +00:00
Sagar Ghuge
e3b172d75d anv: Drop unused param from add_surface_reloc
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22275>
2023-04-04 17:39:20 +00:00
Collabora's Gfx CI Team
91b06ea8b2 Uprev Piglit to 2391a83d1639a7ab7bbea02853b922878687b0e5
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22279>
2023-04-04 15:37:14 +00:00
Tapani Pälli
b0cdd5a1d2 anv: check for MESA_SHADER_TESS_CTRL with get_tcs_prog_data
Fixes: 86d931724d ("anv: Implement Wa_14015297576")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22282>
2023-04-04 10:42:12 +03:00
Tapani Pälli
98c6db3fc8 anv: take primitive ID override to account Wa_14015297576
Commit ca4ec49b0e took primitive ID override fields in to use, this
has to be checked as part of Wa_14015297576.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22282>
2023-04-04 10:41:58 +03:00
Lionel Landwerlin
a88aedbfa5 intel/perf: fix OA format selection on MTL
Anything Gfx12.5+ has a different format.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 90c86fe63e ("intel: add MTL performance metrics")
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22257>
2023-04-03 23:34:17 +00:00
Lionel Landwerlin
c61101f151 intel/dev: set a default valid kmd_type
src/intel/perf/intel_perf_query_layout.c needs a valid kmd type to
look at the metrics

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 757e2dd692 ("intel/perf: Disable it for Xe KMD")
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22257>
2023-04-03 23:34:17 +00:00
Ian Romanick
2016d9f46c intel/fs: Rework the loop of opt_combine_constants that collects constants
This is a bit more wordy, but it will greatly simplify some future
changes.

v2: Rebase on ADD3 changes.

Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Tested-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22274>
2023-04-03 21:50:06 +00:00
Ian Romanick
9e4bb4bfcf intel/fs: Refactor part of opt_combine_constants to a separate function
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Tested-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22274>
2023-04-03 21:50:06 +00:00
Ian Romanick
593cde0432 intel/fs: Output opt_combine_constants debug to stderr
It's a lot more useful to have it in the same stream with the
INTEL_DEBUG=fs output.

Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Tested-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22274>
2023-04-03 21:50:06 +00:00
Faith Ekstrand
6d4e605378 hasvk/pipeline: Use feedback loop flags for self-dependencies
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22191>
2023-04-03 18:13:01 +00:00
Faith Ekstrand
8df8a3c19b anv/pipeline: Use feedback loop flags for self-dependencies
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22191>
2023-04-03 18:13:01 +00:00
Nataraj Deshpande
71fe9dfe07 anv: Bump VkDeviceMemory objects limit to 4GB
Android CTS 13_r4 tests dEQP-VK.memory.allocation.random* fail
with VK_ERROR_OUT_OF_DEVICE_MEMORY on ADL boards with 32GB memory
as memory allocation requests from DEQP are much larger(~2.9GB+)
based on device heap size/8.

Increase the limit to unsigned 32bit max(~4GB) which helps to
fix the dEQP-VK.memory.allocation.random* tests.

v1: Bound allocation by the largest memory heap size (Lionel Landwerlin)

v2: Clean up comments to reflect the code change (Ivan Briano)
    Update the value of MAX_MEMORY_ALLOCATION_SIZE (Lionel Landwerlin)

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22066>
2023-04-03 06:18:52 +00:00
Lionel Landwerlin
b7e5b3e318 isl: update max buffer size for SKL+
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22066>
2023-04-03 06:18:52 +00:00
Lionel Landwerlin
00fc927e52 anv: take care of maxStorageBufferRange being uint32_t
Not fixing anything, but required for another fix.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22066>
2023-04-03 06:18:52 +00:00
Mauro Rossi
b40e7dcf82 hasvk: include "vk_android.h" header in anv_android.c
Fixes the following building errors:

../src/intel/vulkan_hasvk/anv_android.c:387:34: error: implicit declaration of function 'vk_alloc_ahardware_buffer' is invalid in C99 [-Werror,-
Wimplicit-function-declaration]
   struct AHardwareBuffer *ahw = vk_alloc_ahardware_buffer(pAllocateInfo);
                                 ^
../src/intel/vulkan_hasvk/anv_android.c:387:28: error: incompatible integer to pointer conversion initializing 'struct AHardwareBuffer *' with an expression of type 'int' [-Werror,-Wint-conversion]
   struct AHardwareBuffer *ahw = vk_alloc_ahardware_buffer(pAllocateInfo);
                           ^     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
2 errors generated.

Fixes: b16cfe23 ("vulkan,anv,hasvk,radv: Unify Android hardware buffer creation")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22251>
2023-04-02 23:30:42 +02:00
Faith Ekstrand
4b0b75c27a anv: Use the new vk_device_memory base struct
Reviewed-by: Lina Versace <lina@kiwitree.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22038>
2023-03-31 14:57:03 +00:00
Faith Ekstrand
b16cfe23ef vulkan,anv,hasvk,radv: Unify Android hardware buffer creation
Reviewed-by: Lina Versace <lina@kiwitree.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22038>
2023-03-31 14:57:03 +00:00
Faith Ekstrand
0a86df21d0 anv,hasvk: Set vk_image.ahardware_buffer_format
This effectively just modifies it for YCbCr images where the common code
doesn't have a useable format mapping.

Reviewed-by: Lina Versace <lina@kiwitree.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22038>
2023-03-31 14:57:03 +00:00
Faith Ekstrand
41f88be282 vulkan,anv,hasvk,radv: Add a common vk_image_usage_to_ahb_usage helper
Reviewed-by: Lina Versace <lina@kiwitree.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22038>
2023-03-31 14:57:03 +00:00
Felix DeGrood
49f34675f3 anv: set CFE_STATE.OverDispatchControl to default
BSpec specifies default value for CFE_STATE.OverDispatchControl
is 2, or 50% overdispatch. No observed performance impact.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22179>
2023-03-31 14:18:59 +00:00
Felix DeGrood
ecb709c853 anv: only emit CFE_STATE when scratch space increases
On Gen12.5+, we only need to emit CFE_STATE when scratch space
has changed, not on every pipeline binding. Also, only grow the
scratch space, never shrink it. Need to reset after secondary buf.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22179>
2023-03-31 14:18:58 +00:00
Lionel Landwerlin
c88de6c18c anv: move queue check helpers to anv_private
Also fix missing trace point stuff in command buffer begin/end

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Felix DeGrood <felix.j.degrood@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22179>
2023-03-31 14:18:58 +00:00
Lionel Landwerlin
546a6752ac anv: compute the largest GRL kernel scratch size
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Felix DeGrood <felix.j.degrood@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22179>
2023-03-31 14:18:58 +00:00
Felix DeGrood
97e64aef60 anv: cs_stall during compute state flush on < gen12.5
The CS Stall in cmd_buffer_flush_compute_state is only required
on HW that uses MEDIA_VFE_STATE, gen12 and previous.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22179>
2023-03-31 14:18:58 +00:00
Sagar Ghuge
a064e8ff29 intel/decoder: Bump the binding table guess value to 32
Let's bump the binding table value guess to 32 instead of 8 and also stop
decoding the binding table entries as soon as we hit the zero
initialized value in the map.

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22221>
2023-03-31 01:01:53 +00:00
Patrick Lerda
5d85966805 intel: fix memory leak related to brw_nir_create_passthrough_tcs()
Indeed, the parameter "mem_ctx" was not processed.

For instance, this issue is triggered with the crocus driver and
"piglit/bin/shader_runner tests/spec/arb_tessellation_shader/execution/compatibility/tes-clip-vertex-different-from-position.shader_test -auto -fbo":
SUMMARY: AddressSanitizer: 235216 byte(s) leaked in 48 allocation(s).

Fixes: 96ba0344db ("intel: Use common helpers for TCS passthrough shaders")
Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22173>
2023-03-30 10:52:07 +00:00