Commit graph

120162 commits

Author SHA1 Message Date
Francisco Jerez
008f95a043 intel/fs: Add virtual instruction to load mask of live channels into flag register.
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Cc: 20.0 <mesa-stable@lists.freedesktop.org>
2020-02-14 14:31:48 -08:00
Francisco Jerez
b8b509fb92 intel/fs/gen7: Fix fs_inst::flags_written() for SHADER_OPCODE_FIND_LIVE_CHANNEL.
We need to pass a width of 32 since the opcode bashes the whole f1.0
register on IVB.  This is unlikely to have caused problems since f1.0
is largely unused currently.  That's likely to change soon though,
even on platforms other than Gen7.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Cc: 20.0 <mesa-stable@lists.freedesktop.org>
2020-02-14 14:31:48 -08:00
Francisco Jerez
c9e33e5cbf intel/fs/cse: Make HALT instruction act as CSE barrier.
Found by inspection.  This seems particularly likely to cause problems
with instructions dependent on the current execution mask like
SHADER_OPCODE_FIND_LIVE_CHANNEL or the FS_OPCODE_LOAD_LIVE_CHANNELS
instruction I'm about to introduce, but one could imagine it leading
to data corruption if CSE ever managed to combine two instructions
before and after the FS_OPCODE_PLACEHOLDER_HALT, since the one before
may not be executed for some channels.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Cc: 20.0 <mesa-stable@lists.freedesktop.org>
2020-02-14 14:31:48 -08:00
Andreas Baierl
fe1b0b7c50 lima/parser: Extend rsw parsing showing strings instead of numbers
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Andreas Baierl <ichgeh@imkreisrum.de>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3807>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3807>
2020-02-14 21:48:25 +00:00
Marek Olšák
7e2b4bf256 radeonsi: don't wait for shader compilation to finish when destroying a context
This was a hack for glsl_types deinitialization and it predates the proper
fix, which was the addition of glsl_type_singleton_decref.

This fixes a crash when the context is destroyed via the atexit handler.

Cc: 19.3 20.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3800>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3800>
2020-02-14 16:19:38 -05:00
Eric Engestrom
7bee388fb5 egl: directly access static members instead of using _egl{Get,Set}ConfigKey()
This function is meant for when the attribute is unknown at compile-time
(eg. user-specified), but in all these cases it is much simpler to just
read/write the member directly.

Suggested-by: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3816>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3816>
2020-02-14 18:03:07 +00:00
Jonathan Marek
946eacbafb freedreno/a6xx: document some unknown bits
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Rob Clark <robdclark@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3814>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3814>
2020-02-14 08:22:33 -05:00
Jonathan Marek
75fbe089a6 freedreno: name sysmem color/depth flush events
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Reviewed-by: Rob Clark <robdclark@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3814>
2020-02-14 08:22:33 -05:00
Alyssa Rosenzweig
c57456aab6 panfrost: Simplify swizzle translation
It lines up anyway, and Gallium shouldn't change this. (And if it does,
we'll deal with that then since CI would start failing.)

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3824>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3824>
2020-02-14 12:53:36 +00:00
Icecream95
f3490a141c panfrost: Inline panfrost_get_default_swizzle
This commit replaces panfrost_get_default_swizzle with an inlined
implementation where the returned values can be determined at compile
time.

According to perf, this previously used about 2% CPU for Openarena.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3824>
2020-02-14 12:53:36 +00:00
Elie Tournier
efda2cfcf9 spirv2nir: Add kernel spirv support
Signed-off-by: Elie Tournier <elie.tournier@collabora.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3678>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3678>
2020-02-14 11:14:58 +00:00
Elie Tournier
eeb6d61128 spirv2nir: print nir shader if translation succed
Signed-off-by: Elie Tournier <elie.tournier@collabora.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3678>
2020-02-14 11:14:58 +00:00
Erik Faye-Lund
7e80b03dd1 zink: do not use SpvDimRect
Vulkan doesn't support SpvDimRect. But we don't need to pass this at
all, as we already mark the sampler as un-normalized.

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3764>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3764>
2020-02-14 10:51:46 +00:00
Vasily Khoruzhick
f43a3fc28f lima: handle early-z and pixel kill better
[1] calls bit 12 of aux0 'pixel kill' which is likely forward pixel
kill described in [2]. Blob sets this bit if early-z is enabled and
blending is disabled and colormask is RGBA.

Bit 8 seems to be always enabled with bit 9 (early-z).

Let's mimic blob behavior.

[1] https://web.archive.org/web/20171026123213/http://limadriver.org/Render_State/
[2] https://community.arm.com/developer/tools-software/graphics/b/blog/posts/killing-pixels---a-new-optimization-for-shading-on-arm-mali-gpus

Reviewed-by: Andreas Baierl <ichgeh@imkreisrum.de>
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3754>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3754>
2020-02-14 10:03:01 +00:00
Michel Dänzer
582d0c5f14 gitlab-ci: Add three more dEQP-GLES31 tests to softpipe skips
These have randomly flipped lately, see e.g.
https://gitlab.freedesktop.org/mesa/mesa/-/jobs/1620056
https://gitlab.freedesktop.org/daenzer/mesa/-/jobs/1621374
https://gitlab.freedesktop.org/daenzer/mesa/-/jobs/1622156

Reviewed-by: Eric Anholt <eric@anholt.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3811>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3811>
2020-02-14 09:55:48 +01:00
Michel Dänzer
3d16bfc42d gitlab-ci: Sort random failure softpipe skips
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3811>
2020-02-14 09:55:10 +01:00
Samuel Pitoiset
f86bf2e90a docs/new_features: empty the feature list for the 20.1 cycle
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3793>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3793>
2020-02-14 07:31:20 +00:00
Samuel Pitoiset
886acbe1c5 radv: remove unnecessary RADV_DEBUG=nobatchchain option
It was used in the past but nowadays chained submissions work fine.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3791>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3791>
2020-02-14 07:48:14 +01:00
Timothy Arceri
676869e1d4 glsl: fix gl_nir_set_uniform_initializers() for image arrays
The if was incorrectly checking for an image type on what could
be an array of images. Here we change it to use the type stored
in uniform storage which has already been stripped of arrays,
this is what the above code for samplers does also.

Fixes: 2bf91733fc ("nir/linker: Set the uniform initial values")

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3757>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3757>
2020-02-14 01:37:03 +00:00
Rafael Antognolli
6baeca3689 intel/tools: Update aubinator_error_decode.
"ringbuffer" is now called only "ring" in the error state.

v2: Keep compatible with old error state (Lionel).
v3: Also update "gtt_offset" -> "batch".

Closes: https://gitlab.freedesktop.org/drm/intel/issues/1206
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2020-02-13 16:53:18 -08:00
Rob Clark
334788d4cc freedreno: allow INVALID modifier
Re-allow INVALID modifier in import path.  The legacy import path
(createImageFromFds()), which is used by android, uses the INVALID
modifier.  Previously we would ignore this and just setup the imported
buffer as linear.  Restore this behavior to unbreak the legacy import
path.

Fixes: 9891062642 freedreno/a6xx: Implement layout for DRM_FORMAT_MOD_QCOM_COMPRESSED
Signed-off-by: Rob Clark <robdclark@chromium.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3817>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3817>
2020-02-13 19:16:17 +00:00
Sagar Ghuge
3547e19bbd intel/isl: Switch to R8_UNORM format for compatiblity
Gen12 added CCS_E support for A8_UNORM. Intercept A8_UNORM format and
switch to R8_UNORM, as both share the same aux map format encoding so
they are compatible.

Fixes Piglit's ext_framebuffer_multisample-formats all_samples, which
was hitting an assert about A8_UNORM and R8_UINT not being CCS_E
compatible formats.

v2: Add gen check (Kenneth Graunke)

v3: Intercept A8_UNORM and set format to R8_UNORM (Jason Ekstrand)

v4:
- Remove gen check and move block little bit down (Jason Ekstrand)

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3719>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3719>
2020-02-13 18:44:50 +00:00
Sagar Ghuge
207a93bbff intel/isl: Move get_format_encoding function to isl
Move get_format_encoding function to isl and rename to
isl_get_aux_map_format_encoding.

v2:
- Rename isl_get_aux_map_format_encoding to
  isl_format_get_aux_map_encoding (Jason Ekstrand)

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Suggested-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3719>
2020-02-13 18:44:50 +00:00
Fritz Koenig
2a98cf3b2e Revert "gitlab-ci: disable a630 tests as mesa-cheza is down (again)"
This reverts commit 18657c0c0a

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3804>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3804>
2020-02-13 18:13:55 +00:00
Jonathan Marek
5a82273f09 freedreno/a6xx: fix Z24_UNORM_S8_UINT_AS_R8G8B8A8
CI didn't run so missed this.

Note previously had :
   texfmt = TFMT6_Z24_UNORM_S8_UINT
   rbfmt = RB6_Z24_UNORM_S8_UINT_AS_R8G8B8A8

which are both now FMT6_Z24_UNORM_S8_UINT_AS_R8G8B8A8

Fixes: 18786cc7d5 ("freedreno/a6xx: use single format enum")

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3804>
2020-02-13 18:13:55 +00:00
Lionel Landwerlin
4151d84323 iris: add support INTEL_blackhole_render
v2: Use a software mechanism to manage blackhole state

v3: s/iris_batchbuffer/iris_batch/ (Ken)

v4: Fixup state transition mistake (Ken/Lionel)

v5: Cleanup iris_batch_flush (Ken)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2964>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2964>
2020-02-13 17:05:05 +00:00
Lionel Landwerlin
6d35610bd5 st: add support for INTEL_blackhole_render
Adding a new CSO proved to be fairly difficult especially because this
extension affect draw/dispatch/blit alike.

Instead this change passes the state of the noop into the entry points
emitting the operations affected.

v2: Fix assert in default pipe caps

v3: Drop whitespace changes (Ken)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2964>
2020-02-13 17:05:05 +00:00
Lionel Landwerlin
5d7e9edba1 i965: enable INTEL_blackhole_render
v2: condition the extension on context isolation support from the
    kernel (Chris)

v3: (Lionel)

    The initial version of this change used a feature of the Gen7+
    command parser to turn the primitive instructions into no-ops.
    Unfortunately this doesn't play well with how we're using the
    hardware outside of the user submitted commands. For example
    resolves are implicit operations which should not be turned into
    no-ops as part of the previously submitted commands (before
    blackhole_render is enabled) might not be disabled. For example
    this sequence :

       glClear();
       glEnable(GL_BLACKHOLE_RENDER_INTEL);
       glDrawArrays(...);
       glReadPixels(...);
       glDisable(GL_BLACKHOLE_RENDER_INTEL);

    While clear has been emitted outside the blackhole render, it
    should still be resolved properly in the read pixels. Hence we
    need to be more selective and only disable user submitted
    commands.

    This v3 manually turns primitives into MI_NOOP if blackhole render
    is enabled. This lets us enable this feature on any platform.

v4: Limit support to gen7.5+ (Lionel)

v5: Enable Gen7.5 support again, requires a kernel update of the
    command parser (Lionel)

v6: Disable Gen7.5 again... Kernel devs want these patches landed
    before they accept the kernel patches to whitelist INSTPM (Lionel)

v7: Simplify change by never holding noop (there was a shortcoming in the test not considering fast clears)
    Only program register using MI_LRI (Lionel)

v8: Switch to software managed blackhole (BDW hangs on compute batches...)

v9: Simplify the noop state tracking (Lionel)

v10: Don't modify flush function (Ken)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> (v8)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2964>
2020-02-13 17:05:05 +00:00
Lionel Landwerlin
74ec39f66d mesa: add INTEL_blackhole_render
v2: Implement missing Enable/Disable (Emil)

v3: Drop unused NewIntelBlackholeRender (Ken)

v4: Bring back NewIntelBlackholeRender as i965 implementation uses it
    again (Lionel)

v5: Drop atom (Ken)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2964>
2020-02-13 17:05:05 +00:00
Thong Thai
08cff938b7 Revert "st/va: Convert interlaced NV12 to progressive"
This reverts commit 2add63060b.

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2454
Fixes: 2add63060b "st/va: Convert interlaced NV12 to progressive"
Signed-off-by: Thong Thai <thong.thai@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3815>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3815>
2020-02-13 16:43:02 +00:00
Jason Ekstrand
3a2977e7b5 anv: Reject modifiers on depth/stencil formats
6790397346 added code which attempts to reject modifiers on
depth/stencil formats but it was placed after the early return for depth
and stencil aspects.  This commit moves it up so it actually works.

Of course, this doesn't actually matter because the only user of any of
the modifiers stuff is the WSI code and it will never do anything with
depth/stencil.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3794>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3794>
2020-02-13 15:40:18 +00:00
Krzysztof Raszkowski
5a593bec16 gallium/swr: fix rdtsc debug statistics mechanism
Reviewed-by: Jan Zielinski <jan.zielinski@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3812>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3812>
2020-02-13 15:33:27 +01:00
Rhys Perry
dd16ad107d gitlab-ci: remove load_store_vectorizer from expected s390x test failures
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3690>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3690>
2020-02-13 10:53:37 +00:00
Rhys Perry
aca2458d1b nir: fix nir_const_value_as_uint bit size in load/store vectorizer tests
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3690>
2020-02-13 10:53:37 +00:00
Erik Faye-Lund
0c1ba69a27 Revert "nir: Add a couple trivial abs optimizations"
These were already added in 9fdaeb7776 ("nir: add min/max optimisation"),
and there's no point in doing them twice.

This reverts commit e4d346c86d.

Fixes: e4d346c86d ("nir: Add a couple trivial abs optimizations")
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3786>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3786>
2020-02-13 09:18:27 +00:00
Tapani Pälli
fdd20be324 iris: fix aux buf map failure in 32bits app on Android
Cc: mesa-stable@lists.freedesktop.org
Reported-by: Zhifang Long <zhifang.long@intel.com>
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3784>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3784>
2020-02-13 10:54:53 +02:00
Samuel Pitoiset
b9e0947a9e radv: remove unused RADV_HASH_SHADER_IS_GEOM_COPY_SHADER
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3789>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3789>
2020-02-13 08:09:13 +00:00
Samuel Pitoiset
b2531370c9 radv: remove RADV_DEBUG=nosisched and RADV_PERFTEST=sisched
They are no longer useful.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3789>
2020-02-13 08:09:13 +00:00
Samuel Pitoiset
fa48e7edc2 radv: remove LLVM sicheduler enable for The Talos Principle
sisched is completely unmaintained, it used to give few more FPS
in the past but with ACO, it's now obsolete. It seems even faster
without sisched now.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3789>
2020-02-13 08:09:13 +00:00
Tapani Pälli
f7d1bf075a glsl: fix a memory leak with resource_set
==7265== 248 (120 direct, 128 indirect) bytes in 1 blocks are definitely lost in loss record 1,438 of 1,465
   ==7265==    at 0x483980B: malloc (vg_replace_malloc.c:309)
   ==7265==    by 0x598A2AB: ralloc_size (ralloc.c:119)
   ==7265==    by 0x598F861: _mesa_set_create (set.c:127)
   ==7265==    by 0x599079D: _mesa_pointer_set_create (set.c:570)
   ==7265==    by 0x58BD7D1: build_program_resource_list(gl_context*, gl_shader_program*, bool) (linker.cpp:4026)
   ==7265==    by 0x548231B: st_link_shader (st_glsl_to_ir.cpp:170)
   ==7265==    by 0x54DA269: _mesa_glsl_link_shader (ir_to_mesa.cpp:3119)

Fixes: a6aedc66 ("st/glsl_to_nir: use nir based program resource list builder")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3574>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3574>
2020-02-13 07:47:33 +00:00
Samuel Pitoiset
556c940149 radv: implement VK_EXT_line_rasterization
Only Bresenham lines are supported. GFX9 is currently disabled
because there is some CTS failures for some weird reasons.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2982>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2982>
2020-02-13 08:14:01 +01:00
Samuel Pitoiset
fbcf05382b radv: fix line width range and granularity
The hardware supports wide lines and the granularity is way larger.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2982>
2020-02-13 08:14:01 +01:00
Connor Abbott
da64c35ff9 tu: Force sysmem with mipmapped non-aligned linear stores
Fixes hangs with
dEQP-VK.api.image_clearing.core.clear_color_image.1d.linear.single_layer.r8g8b8a8_unorm
and many others on a640, and presumably silent corruption with a630.

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3713>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3713>
2020-02-12 21:37:05 -05:00
Connor Abbott
f026982265 tu: Support input attachments with sysmem
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3713>
2020-02-12 21:37:05 -05:00
Connor Abbott
c1b3f9e832 tu: Support resolve ops with sysmem rendering
Similar to vkCmdClearAttachments(), we use CP_COND_REG_EXEC to
conditionally execute both the gmem and sysmem paths, except for after
the last subpass where it's known whether we're using sysmem rendering
or not.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3713>
2020-02-12 21:37:01 -05:00
Connor Abbott
8647a24a8d tu: Handle vkCmdClearAttachments() with sysmem
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3713>
2020-02-12 21:36:41 -05:00
Connor Abbott
07e07daeae tu: Add helper for CP_COND_REG_EXEC
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3713>
2020-02-12 21:36:41 -05:00
Connor Abbott
6a0c4008bf tu: Sysmem rendering
This has only lightly been tested. It passes dEQP-VK.api.smoke.triangle,
so at least we're able to show a triangle. For now, it's just enabled
under a debug flag. In the future we'll probably want some heuristics
like what freedreno has and another debug flag to disable it except when
it's forced.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3713>
2020-02-12 21:36:36 -05:00
Connor Abbott
041783d49d tu: Disable linear depth attachments
Also, disable importing depth/stencil textures.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3713>
2020-02-12 21:31:57 -05:00
Connor Abbott
ab3db20cb5 tu: Support multisample image clears
We may need shader workarounds for some formats, but for now this seems
to work at least as well as the gmem path for clearing multisample
attachments. And soon we'll start calling this even on the gmem path,
since we leave the final decision of whether to use sysmem or not up
till the end, so we can't have it assert or otherwise working tests
would assert.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3713>
2020-02-12 21:31:57 -05:00