Commit graph

204412 commits

Author SHA1 Message Date
Timothy Arceri
27b56314ee radeonsi: add Gun Godz workaround
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This is another game based on the old YoYo engine

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/work_items/15209

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40757>
2026-04-03 00:01:32 +00:00
Sagar Ghuge
19f39910a9 anv/bvh: Drop atomic on instance_count
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Thanks to Konstantin for pointing out that we really don't need atomics
here. We can use the IR offset to get the slot and keep stuffing the
instance address in it. Header already writes the instance count for us.

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40734>
2026-04-02 22:14:11 +00:00
Rob Herring (Arm)
e100ca7c86 ethosu: Move ethosu_allocate_feature_map() to ethosu_lower.c
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Now that all callers of ethosu_allocate_feature_map() are in ethosu_lower.c,
move it there too.

Reviewed-by: Tomeu Vizoso <tomeu@tomeuvizoso.net>
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40719>
2026-04-02 21:04:25 +00:00
Rob Herring (Arm)
dd10897c5d ethosu: Drop 2nd allocation of IFM and OFM
The IFM and OFM were already allocated by the call to allocate_feature_maps()
in ethosu_lower_convolution().

Reviewed-by: Tomeu Vizoso <tomeu@tomeuvizoso.net>
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40719>
2026-04-02 21:04:25 +00:00
Rob Herring (Arm)
e89a672ab7 ethosu: Fix U85 AvgPool for greater than 8x8 kernel sizes
The U85 uses average mode for kernel sizes less than or equal to 8x8 and
sum mode for larger (in either dimension) kernel sizes. According to the
U85 TRM, the average and sum modes have the following constraints:

average - Average pooling up to 8x8, inbuilt scale only
sum - Sum or average pooling, per-channel, or global scale

Reviewed-by: Tomeu Vizoso <tomeu@tomeuvizoso.net>
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40719>
2026-04-02 21:04:25 +00:00
Jason Macnak
cabc55e9a5 gfxstream: fix submit to not hold lock when calling into encoder
... as this can lead to a deadlock with the following sequence:

Time1: guest-thread-1: vkDestroyImageView() called
Time2:                 VkEncoder grabs seqno 1

Time3: guest-thread-2: vkQueueSubmit() called
Time4:                 ResourceTracker::on_vkQueueSubmitTemplate() locks
                       mLock for using `info_VkFence`
Time5:                 ResourceTracker::on_vkQueueSubmitTemplate() calls
                       enc->vkQueueWaitIdle()
Time6:                 VkEncoder grabs seqno 2
Time7:                 VkEncoder sends the vkQueueWaitIdle with seqno
                       2 via ASG to host
Time8:                 VkEncoder waits for the `VkResult` from the
                       host via `stream->read()`

Time9: guest-thread-1: VkEncoder calls sResourceTracker->destroyMapping()
                       ->mapHandles_VkImageView((VkBuffer*)&buffer);
                       which calls
		       ResourceTracker::unregister_VkImageView()

                       ResourceTracker::unregister_VkImageView() tries to
                       lock mLock to erase the info struct

!!! DEADLOCKED HERE !!!

guest-thread-1 is stuck waiting on mLock (currently locked by
guest-thread-2) before it would `stream->flush();` to finishing
sending the vkDestroyImageView() command to the host and potentially
ping its corresponding host-render-thread-1.

guest-thread-2 is stuck waiting on the result from host-render-thread-2
but host-render-thread-2 won't progress until host-render-thread-1
finishes seqno 1 which needs guest-thread-1 to finish sending/pinging.

Android equivalent change ag/39258728 for b/498964194

Test: cvd create --gpu_mode=gfxstream_guest_angle_host_swiftshader
      open maps
      pan/zoom/etc for a couple minutes

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40767>
2026-04-02 20:20:52 +00:00
Casey Bowman
007be58ade intel/ds: Modify rejection threshold to scale with requested sample period
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Previously, we only checked if the hardware duration was greater
than the requested sample period by 1000 ns. This can lead the
hardware duration to be rejected and use the next cycle, which
is double the size of the current duration.

At larger requested sample size, this can mean getting a hardware
duration of 1.7 ms for a requested sample period of 1 ms.

To fix this, we'll scale the check so that it uses 67% of the
requested sample period as the reject threshold. This way, if the
hardware duration is below 67%, it's guaranteed to be within
100%-133% of the requested sample period on the next hardware interval.

Signed-off-by: Casey Bowman <casey.g.bowman@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40735>
2026-04-02 18:56:16 +00:00
Caio Oliveira
0bf3aaedb1 brw: Always use split send in generator
Instead of generating special single source send in some cases, always
use the split send (called SENDS pre-Xe, and the only option in Xe).
Having code-path for single source was relevant for old Gfx versions,
but for Gfx9+ split send is always available.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40755>
2026-04-02 18:31:02 +00:00
Danylo Piliaiev
3335e707e1 tu: u_trace usage fixes before u_trace refactoring
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- We won't be able to rely on u_trace_fini leaving u_trace in
  valid state, so u_trace_init should be called after it.
- There probably was a double-free of u_trace_submission_data.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40728>
2026-04-02 16:20:09 +00:00
Rob Clark
75fad9e2c4 tu/kgsl: Add UBWC_5 and UBWC_6 support
Handle the two additional UBWC versions used on gen8.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40758>
2026-04-02 15:55:55 +00:00
Zan Dobersek
d574bf0d64 tu/kgsl: bump msm_kgsl.h header
Update the msm_kgsl.h header up to the d45f9faad921 kgsl commit.

Signed-off-by: Zan Dobersek <zdobersek@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40758>
2026-04-02 15:55:55 +00:00
Marek Olšák
27a4c58745 nir/tests: test nir_opt_varyings with sysvals
Test that view_index is moved, and sample_mask_in isn't.

Acked-by: Pierre-Eric
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40664>
2026-04-02 14:38:56 +00:00
Marek Olšák
f3e208ee6c nir/opt_varyings: move expressions with view_index into preceding shaders
Example:

Before:
    VS output0 = v0
    VS output1 = v1
    FS output = gl_ViewIndex == 0 ? input0 : input1;

After:
    VS output0 = gl_ViewIndex == 0 ? v0 : v1;
    FS output = input0;

Acked-by: Pierre-Eric
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40664>
2026-04-02 14:38:56 +00:00
Marek Olšák
92cf9af827 nir: factor out nir_system_value_from_instr from nir_opt_varyings
Acked-by: Pierre-Eric
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40664>
2026-04-02 14:38:56 +00:00
Marek Olšák
bfc75c0641 nir: return a failure value from nir_system_value_from_intrinsic
We need to be able to check whether an intrinsic loads a sysval.

Acked-by: Pierre-Eric
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40664>
2026-04-02 14:38:56 +00:00
Rob Clark
e6af9524b0 freedreno/a6xx: Fix blit fmt check
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The commit that introduced 9_9_9_E5 RB support mistakenly broke
fake-format blits (such as compressed formats, etc).  Re-order the
logic to restore fake-format blits.

Fixes iova fault in manhattan.  Not to mention inadvertantly falling
off of the A2D path for a lot of blits.

Fixes: 9dc3410512 ("tu: Add support for VK_FORMAT_E5B9G9R9_UFLOAT_PACK32 color attachments")
Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40754>
2026-04-02 14:21:03 +00:00
Silvio Vilerino
b83a931cb1 d3d12: Video sliced encode: Use same ID3D12Fence/different per slice values as optimization
Reviewed-by: Pohsiang (John) Hsu <pohhsu@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40756>
2026-04-02 13:54:02 +00:00
Silvio Vilerino
9f4d3267c9 d3d12: Fix video fence leak and double assign
Reviewed-by: Pohsiang (John) Hsu <pohhsu@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40756>
2026-04-02 13:54:02 +00:00
Wenfeng Gao
aa5398689b mediafoundation: Fix the frame number validation logic for motion hint
The external move region frame number was continuously generated. However, the current POC was reset based on IDR.
Modified the logic of validation and logged a warning in case of mismatch.

Reviewed-by: Pohsiang (John) Hsu <pohhsu@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40756>
2026-04-02 13:54:02 +00:00
Pavel Ondračka
33864e569e st/bitmap: release the temporary bitmap sampler view
st_cb_bitmap appends a temporary bitmap sampler view to the sampler
view array passed to set_sampler_views().

1a5c660ef5 changed this path to only release the extra YUV views
returned by st_get_sampler_views(), but the temporary bitmap view is
created locally and is not part of extra_sampler_views. It therefore
stopped being released so release the temporary bitmap sampler view
explicitly after drawing the bitmap quad.

Fixes: 1a5c660ef5 ("st/bitmap: only release YUV samplerviews")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40694>
2026-04-02 08:34:54 +00:00
Karol Herbst
72e9f9a760 nak: add algebraic patterns to improve MUFU.F16
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Doesn't really help many shaders, but I've seen a couple that turn from
MUFU into F2F(MUFU.F16(F2F)). Though this might be as well a limitation
of related code, e.g. returning F32 from TEX, and not use TEX.F16 instead.

Totals:
CodeSize: 8662337424 -> 8662336960 (-0.00%)
Static cycle count: 4718044491 -> 4718044554 (+0.00%); split: -0.00%, +0.00%

Totals from 7 (0.00% of 1163204) affected shaders:
CodeSize: 236480 -> 236016 (-0.20%)
Static cycle count: 2108061 -> 2108124 (+0.00%); split: -0.01%, +0.01%

Reviewed-by: Mel Henning <mhenning@darkrefraction.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40392>
2026-04-02 01:10:57 +00:00
Karol Herbst
9cc2cd843b nak: enable MUFU.F16 on Turing and newer
Totals from 1427 (0.12% of 1163204) affected shaders:
CodeSize: 18599616 -> 18495424 (-0.56%); split: -0.56%, +0.00%
Number of GPRs: 91579 -> 91571 (-0.01%)
SLM Size: 14144 -> 14140 (-0.03%)
Static cycle count: 96164214 -> 96075886 (-0.09%); split: -0.13%, +0.04%
Spills to memory: 2677 -> 2681 (+0.15%)
Fills from memory: 2677 -> 2681 (+0.15%)
Max warps/SM: 48868 -> 48872 (+0.01%)

Reviewed-by: Mel Henning <mhenning@darkrefraction.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40392>
2026-04-02 01:10:57 +00:00
Karol Herbst
c7ff7c7d40 nak: add hw_test for MUFU.F16
Reviewed-by: Mel Henning <mhenning@darkrefraction.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40392>
2026-04-02 01:10:57 +00:00
Karol Herbst
d031365f7c nak: support MUFU.F16
Reviewed-by: Mel Henning <mhenning@darkrefraction.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40392>
2026-04-02 01:10:57 +00:00
Karol Herbst
3d94841bba nak: remove OpF2F::dst_high
It was dead code

Reviewed-by: Mel Henning <mhenning@darkrefraction.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40392>
2026-04-02 01:10:57 +00:00
Karol Herbst
67bfbc7535 nak: rework swizzling on scalar FP16 ops
Instructions that take a F16 value can generally select which component to
read from. This lets us get rid of some PRMTs.

This also cleans up partial support for it for F2F and streamlines
everything into an uniform model as previously it wasn't wired up
generally and copy prop didn't always propagate the swizzle through.

This also makes it uneccessary to apply a Xx swizzle to scalar FP16
sources.

Totals from 907 (0.08% of 1163204) affected shaders:
CodeSize: 40856816 -> 40843408 (-0.03%); split: -0.03%, +0.00%
Static cycle count: 20898101 -> 20895619 (-0.01%); split: -0.01%, +0.00%

Reviewed-by: Mel Henning <mhenning@darkrefraction.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40392>
2026-04-02 01:10:56 +00:00
Ahmed Hesham
e77c984cef rusticl: fix flag validation when creating an image
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From the OpenCL specification:
    `CL_MEM_KERNEL_READ_AND_WRITE`: This flag is only used by
    clGetSupportedImageFormats to query image formats that may be both
    read from and written to by the same kernel instance. To create a
    memory object that may be read from and written to use
    CL_MEM_READ_WRITE.

If an application follows the instructions above, i.e. query a list of
supported image formats, using `CL_MEM_KERNEL_READ_AND_WRITE` as
input, and then attempts to create an image using one of the supported
image formats, by calling `clCreateImage` and passing
`CL_MEM_READ_WRITE`, the call to the image creation entry point should
succeed. This instead fails on Mali devices with the error
`CL_IMAGE_FORMAT_NOT_SUPPORTED`.

Rusticl fails when validating the image format against its supported
flags. Formats that support `PIPE_BIND_SHADER_IMAGE` have their
supported flags set as `CL_MEM_WRITE_ONLY` and
`CL_MEM_KERNEL_READ_AND_WRITE`.

This changes the supported CL flags to be `CL_MEM_WRITE_ONLY` for
`PIPE_BIND_SHADER_IMAGE` and `CL_MEM_READ_WRTE |
CL_MEM_KERNEL_READ_AND_WRITE` for `PIPE_BIND_SAMPLER_VIEW |
PIPE_BIND_SHADER_IMAGE`.

Fixes: 3386e142 (rusticl: support read_write images)

Fixes OpenCL-CTS test: `test_image_streams` on Mali. Invocation:
```
test_image_streams write 1D CL_RGB CL_SIGNED_INT8
```

Signed-off-by: Ahmed Hesham <ahmed.hesham@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39692>
2026-04-01 20:15:06 +00:00
Pohsiang (John) Hsu
64d95c5ca9 d3d12: ifdef the surfaces member from d3d12_batch under HAVE_GALLIUM_D3D12_GRAPHICS
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Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40751>
2026-04-01 18:37:22 +00:00
Tanner Van De Walle
325b7692f8 d3d12: Fix d3d12_surface_destroy() to match pipe_surface_destroy_func()
Fixes: 0615a276 ("gallium: add a destructor param to surface refcounting functions")

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40751>
2026-04-01 18:37:22 +00:00
Lorenzo Rossi
a45a7bbf44 pan/compiler: Split bifrost_nir.c from bifrost_compile.c
Before this, everything was in the giant bifrost_compile.c file, now
preprocess, optimize and postproces are in their own "small"
bifrost_nir.c.

I also removed some dead functions and moved the passes closer to their
usage, (ex, passes only used in preprocess are now just before
preprocess). Otherwise it's all the same code we had before.

Signed-off-by: Lorenzo Rossi <lorenzo.rossi@collabora.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40717>
2026-04-01 18:14:32 +00:00
Lorenzo Rossi
7d8b2c4128 pan/compiler: Split bi_debug.c from bifrost_compile.c
Signed-off-by: Lorenzo Rossi <lorenzo.rossi@collabora.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40717>
2026-04-01 18:14:32 +00:00
Lorenzo Rossi
f19b9eddb6 pan/compiler: Replace bi_lower_ldexp16 with algebraic pass
Signed-off-by: Lorenzo Rossi <lorenzo.rossi@collabora.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40717>
2026-04-01 18:14:31 +00:00
Boyuan Zhang
4fe64d23b8 ac/vcn_dec: add addr_mode for VCN 5.0.1
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VCN 5_0_1 uses gfx9 address mode. This was also set in previous
radeon_vcn_dec codes.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Reviewed-by: David Rosca <david.rosca@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40736>
2026-04-01 10:32:20 -04:00
Samuel Pitoiset
61c85c8d31 vulkan: fix determining the heap ptr
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40729>
2026-04-01 12:56:43 +00:00
Samuel Pitoiset
521b1c9584 vulkan: remove unused parameters in vk_build_descriptor_heap_address()
Also make it static.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40729>
2026-04-01 12:56:43 +00:00
Lionel Landwerlin
b4aaa17a11 nir/lower_io: add index support for load_param_intel
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40729>
2026-04-01 12:56:43 +00:00
Lionel Landwerlin
22b16d54ab nir: add heap variant of load_param_intel
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40729>
2026-04-01 12:56:43 +00:00
Lionel Landwerlin
4f74d9293f nir/divergence: handle resource_intel like other intrinsics
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40729>
2026-04-01 12:56:43 +00:00
Lionel Landwerlin
0b1c23103e vulkan/runtime: convert descriptor heap pipeline flag to shader flag
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40729>
2026-04-01 12:56:43 +00:00
Georg Lehmann
0975e1513a nir/opt_large_constants: optimize constant arrays with just two different values
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Often, games just use arrays to select between 1.0 and 0.0 or -1.0.

In the case where all values are the same except one index, use a
compare instead of a shift. It's impossible to optimize the shift to
just a compare because of NIR's SM5 shift semantics, but when we know the
array length, it works just fine.

Foz-DB Navi21:
Totals from 3393 (2.96% of 114627) affected shaders:
MaxWaves: 87039 -> 87087 (+0.06%)
Instrs: 4991034 -> 4977962 (-0.26%); split: -0.28%, +0.02%
CodeSize: 27505196 -> 27509988 (+0.02%); split: -0.08%, +0.10%
VGPRs: 156216 -> 154720 (-0.96%)
SpillSGPRs: 812 -> 801 (-1.35%); split: -1.60%, +0.25%
Latency: 38221096 -> 38207053 (-0.04%); split: -0.10%, +0.06%
InvThroughput: 9518564 -> 9469903 (-0.51%); split: -0.52%, +0.01%
VClause: 121340 -> 121370 (+0.02%); split: -0.05%, +0.07%
SClause: 127822 -> 127996 (+0.14%); split: -0.01%, +0.14%
Copies: 437743 -> 437832 (+0.02%); split: -0.40%, +0.43%
Branches: 173910 -> 173893 (-0.01%); split: -0.17%, +0.16%
PreSGPRs: 147137 -> 147957 (+0.56%); split: -0.01%, +0.57%
PreVGPRs: 126313 -> 126296 (-0.01%); split: -0.09%, +0.08%
VALU: 3309713 -> 3288169 (-0.65%); split: -0.66%, +0.01%
SALU: 762369 -> 770904 (+1.12%); split: -0.03%, +1.15%
VMEM: 182394 -> 182392 (-0.00%)
SMEM: 201777 -> 201801 (+0.01%); split: -0.00%, +0.01%

Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40539>
2026-04-01 12:23:18 +00:00
Samuel Pitoiset
98d486ea77 spirv: handle untyped pointer storage class with descriptor heap
It's possible with descriptor heap.

Original patch by Faith Ekstrand <faith.ekstrand@collabora.com>.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40731>
2026-04-01 11:46:16 +00:00
Samuel Pitoiset
1f8be7bfad spirv: fix OpUntypedVariableKHR with optional data type parameter
This would read OOB and crash because data type is optional per the
SPIRV spec.

Original patch by Faith Ekstrand <faith.ekstrand@collabora.com>.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40731>
2026-04-01 11:46:16 +00:00
Georg Lehmann
eff9f00533 nir/search: remove matching variable type
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Now unused, and if you really need it use a search helper.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40713>
2026-04-01 09:52:45 +00:00
Georg Lehmann
5b1405dcbf nir/opt_algebraic: remove a few non 1bit bool patterns
We almost exclusive optimize 1bit booleans nowadays,
so I think these shouldn't be needed.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40713>
2026-04-01 09:52:45 +00:00
Juan A. Suarez Romero
37a6be551b v3dv/ci: add link to failing CTS test
The failing test seems wrong, and a link to the issue is provided.

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40739>
2026-04-01 09:27:22 +00:00
Juan A. Suarez Romero
eeeb71b39f v3d/ci: add new OpenCL failure
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40739>
2026-04-01 09:27:22 +00:00
Juan A. Suarez Romero
48c086cb42 vc4: fix unwanted buffer release on uploader
When converting the index buffer from 4-bytes to 2-bytes, we use the
uploader for the job. Since commit b3133e250e we do an uploader alloc
ref, which releases the uploader buffer if there is no enough space,
creating a new one.

The problem happens when we also need this buffer because it is the one
containing the index buffer to convert. This happens, for instance, if
we need to convert the primitives because they are not supported (e.g.,
converting quads to triangles), as this is done
also using the uploader.

The solution is to ensure the uploader's buffer has an extra reference
so when released, it is not destroyed. This can easily achieved by
calling first pipe_buffer_map_range(), which is required to access the
buffer, and it increases the references.

This fixes `spec@!opengl 1.1@longprim`.

Fixes: b3133e250e ("gallium: add pipe_context::resource_release to eliminate buffer refcounting")
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40642>
2026-04-01 09:10:26 +00:00
Samuel Pitoiset
e27e41a842 vulkan,spirv: update headers
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Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40721>
2026-04-01 07:39:37 +00:00
Samuel Pitoiset
21acbe414e vulkan: rename VK_EXT_device_fault features
They conflict with VK_KHR_device_fault.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40721>
2026-04-01 07:39:37 +00:00
Samuel Pitoiset
bf7e29617d radv: emit BOP events after every draw to workaround a VRS bug on GFX12
Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/work_items/14812
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40715>
2026-04-01 07:11:45 +00:00