ir3: Limit CS lock/unlock quirk

We don't need this universally for everything >= gen7.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38450>
This commit is contained in:
Rob Clark 2025-11-01 13:05:35 -07:00 committed by Marge Bot
parent e00bff2513
commit d1df3b4e39
4 changed files with 8 additions and 1 deletions

View file

@ -375,6 +375,9 @@ struct fd_dev_info {
*/
bool reading_shading_rate_requires_smask_quirk;
/* Is lock/unlock sequence needed at end of compute shader? */
bool cs_lock_unlock_quirk;
/* Whether the ray_intersection instruction is present. */
bool has_ray_intersection;

View file

@ -994,6 +994,7 @@ a7xx_gen1 = GPUProps(
fs_must_have_non_zero_constlen_quirk = True,
enable_tp_ubwc_flag_hint = True,
reading_shading_rate_requires_smask_quirk = True,
cs_lock_unlock_quirk = True,
)
a7xx_gen2 = GPUProps(

View file

@ -210,6 +210,9 @@ struct ir3_compiler {
/* Whether half register shared->non-shared moves are broken. */
bool mov_half_shared_quirk;
/* Is lock/unlock sequence needed for CS? */
bool cs_lock_unlock_quirk;
/* Whether movs is supported for subgroupBroadcast. */
bool has_movs;

View file

@ -6035,7 +6035,7 @@ ir3_compile_shader_nir(struct ir3_compiler *compiler,
*/
IR3_PASS(ir, ir3_legalize, so, &max_bary);
if (ctx->compiler->gen >= 7 && so->type == MESA_SHADER_COMPUTE) {
if (ctx->compiler->cs_lock_unlock_quirk && so->type == MESA_SHADER_COMPUTE) {
struct ir3_instruction *end = ir3_find_end(so->ir);
struct ir3_instruction *lock =
ir3_build_instr(&ctx->build, OPC_LOCK, 0, 0);