diff --git a/src/freedreno/common/freedreno_dev_info.h b/src/freedreno/common/freedreno_dev_info.h
index d88d0bbda5f..10f3468af20 100644
--- a/src/freedreno/common/freedreno_dev_info.h
+++ b/src/freedreno/common/freedreno_dev_info.h
@@ -375,6 +375,9 @@ struct fd_dev_info {
        */
       bool reading_shading_rate_requires_smask_quirk;
 
+      /* Is lock/unlock sequence needed at end of compute shader? */
+      bool cs_lock_unlock_quirk;
+
       /* Whether the ray_intersection instruction is present. */
       bool has_ray_intersection;
 
diff --git a/src/freedreno/common/freedreno_devices.py b/src/freedreno/common/freedreno_devices.py
index 1b9ca1055ed..844b802f688 100644
--- a/src/freedreno/common/freedreno_devices.py
+++ b/src/freedreno/common/freedreno_devices.py
@@ -994,6 +994,7 @@ a7xx_gen1 = GPUProps(
         fs_must_have_non_zero_constlen_quirk = True,
         enable_tp_ubwc_flag_hint = True,
         reading_shading_rate_requires_smask_quirk = True,
+        cs_lock_unlock_quirk = True,
     )
 
 a7xx_gen2 = GPUProps(
diff --git a/src/freedreno/ir3/ir3_compiler.h b/src/freedreno/ir3/ir3_compiler.h
index 0f548829674..df3ce4abdc6 100644
--- a/src/freedreno/ir3/ir3_compiler.h
+++ b/src/freedreno/ir3/ir3_compiler.h
@@ -210,6 +210,9 @@ struct ir3_compiler {
    /* Whether half register shared->non-shared moves are broken. */
    bool mov_half_shared_quirk;
 
+   /* Is lock/unlock sequence needed for CS? */
+   bool cs_lock_unlock_quirk;
+
    /* Whether movs is supported for subgroupBroadcast. */
    bool has_movs;
 
diff --git a/src/freedreno/ir3/ir3_compiler_nir.c b/src/freedreno/ir3/ir3_compiler_nir.c
index f0fa4ee3c54..7f9c2d98753 100644
--- a/src/freedreno/ir3/ir3_compiler_nir.c
+++ b/src/freedreno/ir3/ir3_compiler_nir.c
@@ -6035,7 +6035,7 @@ ir3_compile_shader_nir(struct ir3_compiler *compiler,
     */
    IR3_PASS(ir, ir3_legalize, so, &max_bary);
 
-   if (ctx->compiler->gen >= 7 && so->type == MESA_SHADER_COMPUTE) {
+   if (ctx->compiler->cs_lock_unlock_quirk && so->type == MESA_SHADER_COMPUTE) {
       struct ir3_instruction *end = ir3_find_end(so->ir);
       struct ir3_instruction *lock =
          ir3_build_instr(&ctx->build, OPC_LOCK, 0, 0);