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iris: Set missing flags on clear color changes

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When changing the clear color without a fast clear, use dirty bits to
ensure that surfaces with inline clear colors are updated and that
partial resolves are done as needed.

Remove the flags at the bottom of fast_clear_color() as
blorp_fast_clear() already sets them for us.

Fixes: 64d861b700 ("iris: Skip some fast-clears even on color changes")
Reviewed-by: Jianxun Zhang <jianxun.zhang@intel.com>
(cherry picked from commit 3b642f7456)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39745>
This commit is contained in:
Nanley Chery 2025-10-02 14:34:57 -04:00 • committed by Dylan Baker
parent b9d7b5e3f8
commit cad984ba7e
2 changed files with 23 additions and 7 deletions
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2
.pick_status.json
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@ -164,7 +164,7 @@
"description": "iris: Set missing flags on clear color changes",
"nominated": true,
"nomination_type": 2,
"resolution": 0,
"resolution": 1,
"main_sha": null,
"because_sha": "64d861b700e4e7dde08027af8f43f7b186489453",
"notes": null

28
src/gallium/drivers/iris/iris_clear.c
View file

@ -303,9 +303,28 @@ fast_clear_color(struct iris_context *ice,
PIPE_CONTROL_RENDER_TARGET_FLUSH);
}
/* Update the clear color now that previous rendering is complete. */
if (color_changed && res->aux.clear_color_bo)
iris_resource_update_indirect_color(batch, res);
if (color_changed) {
if (devinfo->ver <= 12) {
/* A new clear color may require partial resolves later on. */
ice->state.dirty |= IRIS_DIRTY_RENDER_RESOLVES_AND_FLUSHES |
IRIS_DIRTY_COMPUTE_RESOLVES_AND_FLUSHES;
ice->state.stage_dirty |= IRIS_ALL_STAGE_DIRTY_BINDINGS;
}
if (devinfo->ver >= 20) {
/* The clear pixel is updated by hardware during fast clears. */
assert(batch->screen->isl_dev.ss.clear_color_state_size == 0);
assert(batch->screen->isl_dev.ss.clear_value_size == 0);
} else if (devinfo->ver >= 11) {
/* Update dwords used for rendering and sampling. */
assert(batch->screen->isl_dev.ss.clear_color_state_size > 0);
iris_resource_update_indirect_color(batch, res);
} else {
/* We've flagged surface states with inline clear colors as dirty. */
assert(batch->screen->isl_dev.ss.clear_value_size > 0);
assert(ice->state.stage_dirty & IRIS_ALL_STAGE_DIRTY_BINDINGS);
}
}
/* If the buffer is already in ISL_AUX_STATE_CLEAR, the clear is redundant
* and can be skipped.
@ -388,9 +407,6 @@ fast_clear_color(struct iris_context *ice,
box->depth, devinfo->ver < 20 ?
ISL_AUX_STATE_CLEAR :
ISL_AUX_STATE_COMPRESSED_NO_CLEAR);
ice->state.dirty |= IRIS_DIRTY_RENDER_BUFFER;
ice->state.stage_dirty |= IRIS_ALL_STAGE_DIRTY_BINDINGS;
return;
}
static void