diff --git a/src/amd/vulkan/nir/radv_nir.h b/src/amd/vulkan/nir/radv_nir.h
index 874488511d6..2b92acc6174 100644
--- a/src/amd/vulkan/nir/radv_nir.h
+++ b/src/amd/vulkan/nir/radv_nir.h
@@ -61,8 +61,6 @@ bool radv_nir_lower_viewport_to_zero(nir_shader *nir);
 
 bool radv_nir_export_multiview(nir_shader *nir);
 
-void radv_nir_lower_io_vars_to_scalar(nir_shader *nir, nir_variable_mode mask);
-
 unsigned radv_map_io_driver_location(unsigned semantic);
 
 bool radv_recompute_fs_input_bases(nir_shader *nir);
diff --git a/src/amd/vulkan/nir/radv_nir_lower_io.c b/src/amd/vulkan/nir/radv_nir_lower_io.c
index 1f5f338f622..61c248b06e0 100644
--- a/src/amd/vulkan/nir/radv_nir_lower_io.c
+++ b/src/amd/vulkan/nir/radv_nir_lower_io.c
@@ -21,14 +21,6 @@ type_size_vec4(const struct glsl_type *type, bool bindless)
    return glsl_count_attribute_slots(type, false);
 }
 
-void
-radv_nir_lower_io_vars_to_scalar(nir_shader *nir, nir_variable_mode mask)
-{
-   bool progress = false;
-
-   NIR_PASS(progress, nir, nir_lower_io_vars_to_scalar, mask);
-}
-
 typedef struct {
    uint64_t always_per_vertex;
    uint64_t potentially_per_primitive;
diff --git a/src/amd/vulkan/radv_pipeline_graphics.c b/src/amd/vulkan/radv_pipeline_graphics.c
index b7174c6a85c..e1f7965af0c 100644
--- a/src/amd/vulkan/radv_pipeline_graphics.c
+++ b/src/amd/vulkan/radv_pipeline_graphics.c
@@ -1235,9 +1235,6 @@ radv_link_shaders(struct radv_shader_stage *producer_stage, struct radv_shader_s
    nir_lower_io_array_vars_to_elements(producer, consumer);
    nir_validate_shader(producer, "after nir_lower_io_arrays_to_elements");
    nir_validate_shader(consumer, "after nir_lower_io_arrays_to_elements");
-
-   radv_nir_lower_io_vars_to_scalar(producer, nir_var_shader_out);
-   radv_nir_lower_io_vars_to_scalar(consumer, nir_var_shader_in);
 }
 
 static const mesa_shader_stage graphics_shader_order[] = {