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radv: Add bool return value to radv_nir_apply_pipeline_layout.

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And stop using it with the deprecated NIR_PASS_V macro.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33609>
This commit is contained in:
Timur Kristóf 2025-02-17 23:40:01 +01:00
parent e3e2ba4eb5
commit bf1a968a11
3 changed files with 22 additions and 11 deletions
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2
src/amd/vulkan/nir/radv_nir.h
View file

@ -26,7 +26,7 @@ struct radv_shader_layout;
struct radv_device; struct radv_device;
struct radv_graphics_state_key; struct radv_graphics_state_key;
void radv_nir_apply_pipeline_layout(nir_shader *shader, struct radv_device *device, bool radv_nir_apply_pipeline_layout(nir_shader *shader, struct radv_device *device,
const struct radv_shader_stage *stage); const struct radv_shader_stage *stage);
bool radv_nir_lower_abi(nir_shader *shader, enum amd_gfx_level gfx_level, const struct radv_shader_stage *stage, bool radv_nir_lower_abi(nir_shader *shader, enum amd_gfx_level gfx_level, const struct radv_shader_stage *stage,

29
src/amd/vulkan/nir/radv_nir_apply_pipeline_layout.c
View file

@ -409,7 +409,7 @@ load_push_constant(nir_builder *b, apply_layout_state *state, nir_intrinsic_inst
return nir_extract_bits(b, data, num_loads, 0, intrin->def.num_components, bit_size); return nir_extract_bits(b, data, num_loads, 0, intrin->def.num_components, bit_size);
} }
static void static bool
apply_layout_to_intrin(nir_builder *b, apply_layout_state *state, nir_intrinsic_instr *intrin) apply_layout_to_intrin(nir_builder *b, apply_layout_state *state, nir_intrinsic_instr *intrin)
{ {
b->cursor = nir_before_instr(&intrin->instr); b->cursor = nir_before_instr(&intrin->instr);
@ -454,11 +454,13 @@ apply_layout_to_intrin(nir_builder *b, apply_layout_state *state, nir_intrinsic_
break; break;
} }
default: default:
break; return false;
} }
return true;
} }
static void static bool
apply_layout_to_tex(nir_builder *b, apply_layout_state *state, nir_tex_instr *tex) apply_layout_to_tex(nir_builder *b, apply_layout_state *state, nir_tex_instr *tex)
{ {
b->cursor = nir_before_instr(&tex->instr); b->cursor = nir_before_instr(&tex->instr);
@ -526,7 +528,7 @@ apply_layout_to_tex(nir_builder *b, apply_layout_state *state, nir_tex_instr *te
if (tex->op == nir_texop_descriptor_amd) { if (tex->op == nir_texop_descriptor_amd) {
nir_def_replace(&tex->def, image); nir_def_replace(&tex->def, image);
return; return true;
} }
for (unsigned i = 0; i < tex->num_srcs; i++) { for (unsigned i = 0; i < tex->num_srcs; i++) {
@ -543,11 +545,14 @@ apply_layout_to_tex(nir_builder *b, apply_layout_state *state, nir_tex_instr *te
break; break;
} }
} }
return true;
} }
void bool
radv_nir_apply_pipeline_layout(nir_shader *shader, struct radv_device *device, const struct radv_shader_stage *stage) radv_nir_apply_pipeline_layout(nir_shader *shader, struct radv_device *device, const struct radv_shader_stage *stage)
{ {
bool progress = false;
const struct radv_physical_device *pdev = radv_device_physical(device); const struct radv_physical_device *pdev = radv_device_physical(device);
const struct radv_instance *instance = radv_physical_device_instance(pdev); const struct radv_instance *instance = radv_physical_device_instance(pdev);
@ -577,12 +582,18 @@ radv_nir_apply_pipeline_layout(nir_shader *shader, struct radv_device *device, c
nir_foreach_block_reverse (block, function->impl) { nir_foreach_block_reverse (block, function->impl) {
nir_foreach_instr_reverse_safe (instr, block) { nir_foreach_instr_reverse_safe (instr, block) {
if (instr->type == nir_instr_type_tex) if (instr->type == nir_instr_type_tex)
apply_layout_to_tex(&b, &state, nir_instr_as_tex(instr)); progress |= apply_layout_to_tex(&b, &state, nir_instr_as_tex(instr));
else if (instr->type == nir_instr_type_intrinsic) else if (instr->type == nir_instr_type_intrinsic)
apply_layout_to_intrin(&b, &state, nir_instr_as_intrinsic(instr)); progress |= apply_layout_to_intrin(&b, &state, nir_instr_as_intrinsic(instr));
} }
} }
nir_metadata_preserve(function->impl, nir_metadata_control_flow);
} }
if (progress) {
nir_foreach_function (function, shader) {
nir_metadata_preserve(function->impl, nir_metadata_control_flow);
}
}
return progress;
} }

2
src/amd/vulkan/radv_pipeline.c
View file

@ -398,7 +398,7 @@ radv_postprocess_nir(struct radv_device *device, const struct radv_graphics_stat
NIR_PASS(_, stage->nir, nir_opt_constant_folding); NIR_PASS(_, stage->nir, nir_opt_constant_folding);
/* TODO: vectorize loads after this to vectorize loading adjacent descriptors */ /* TODO: vectorize loads after this to vectorize loading adjacent descriptors */
NIR_PASS_V(stage->nir, radv_nir_apply_pipeline_layout, device, stage); NIR_PASS(_, stage->nir, radv_nir_apply_pipeline_layout, device, stage);
NIR_PASS(_, stage->nir, nir_lower_alu_width, opt_vectorize_callback, device); NIR_PASS(_, stage->nir, nir_lower_alu_width, opt_vectorize_callback, device);