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amd/common: Store non-displayable DCC pitch.

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For DRM planes with modifiers.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6783>
This commit is contained in:
Bas Nieuwenhuizen 2020-08-03 01:05:07 +02:00 • committed by Marek Olšák
parent 4656e68294
commit be48cf804b
2 changed files with 2 additions and 0 deletions
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1
src/amd/common/ac_surface.c
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@ -1569,6 +1569,7 @@ static int gfx9_compute_miptree(struct ac_addrlib *addrlib, const struct radeon_
surf->u.gfx9.display_dcc_size = surf->dcc_size;
surf->u.gfx9.display_dcc_alignment = surf->dcc_alignment;
surf->u.gfx9.display_dcc_pitch_max = dout.pitch - 1;
surf->u.gfx9.dcc_pitch_max = dout.pitch - 1;
/* Compute displayable DCC. */
if (in->flags.display && surf->num_dcc_levels && info->use_display_dcc_with_retile_blit) {

1
src/amd/common/ac_surface.h
View file

@ -180,6 +180,7 @@ struct gfx9_surf_layout {
uint32_t display_dcc_size;
uint32_t display_dcc_alignment;
uint16_t display_dcc_pitch_max; /* (mip chain pitch - 1) */
uint16_t dcc_pitch_max;
bool dcc_retile_use_uint16; /* if all values fit into uint16_t */
uint32_t dcc_retile_num_elements;
void *dcc_retile_map;