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radeonsi: fix user fence GPU address

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User fence should have 4 QWORD memory space, I updated its CPU address
but forgot to update GPU address.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3513
Fixes: 3d5bed0e88 "radeonsi: fix user fence space when MCBP is enabled"
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6776>
This commit is contained in:
Qiang Yu 2020-09-18 20:03:46 +08:00 • committed by Marge Bot
parent 9aa86eb61a
commit 4656e68294
1 changed files with 1 additions and 1 deletions
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2
src/gallium/winsys/amdgpu/drm/amdgpu_cs.c
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@ -973,7 +973,7 @@ amdgpu_cs_create(struct radeon_winsys_ctx *rwctx,
struct amdgpu_cs_fence_info fence_info;
fence_info.handle = cs->ctx->user_fence_bo;
fence_info.offset = cs->ring_type;
fence_info.offset = cs->ring_type * 4;
amdgpu_cs_chunk_fence_info_to_data(&fence_info, (void*)&cs->fence_chunk);
cs->main.ib_type = IB_MAIN;