intel/brw: Drop dead CHV checks.

This compiler no longer supports Cherryview.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28458>
This commit is contained in:
Kenneth Graunke 2024-03-27 15:59:49 -07:00 committed by Marge Bot
parent e3d12cf72f
commit a520c976a5
4 changed files with 3 additions and 8 deletions

View file

@ -2048,8 +2048,7 @@ brw_broadcast(struct brw_codegen *p,
/* Use indirect addressing to fetch the specified component. */
if (type_sz(src.type) > 4 &&
(devinfo->platform == INTEL_PLATFORM_CHV || intel_device_info_is_9lp(devinfo) ||
!devinfo->has_64bit_int)) {
(intel_device_info_is_9lp(devinfo) || !devinfo->has_64bit_int)) {
/* From the Cherryview PRM Vol 7. "Register Region Restrictions":
*
* "When source or destination datatype is 64b or operation is

View file

@ -1383,8 +1383,7 @@ fs_generator::generate_code(const cfg_t *cfg, int dispatch_width,
break;
case SHADER_OPCODE_CLUSTER_BROADCAST: {
assert((devinfo->platform != INTEL_PLATFORM_CHV &&
!intel_device_info_is_9lp(devinfo) &&
assert((!intel_device_info_is_9lp(devinfo) &&
devinfo->has_64bit_float) || type_sz(src[0].type) <= 4);
assert(!src[0].negate && !src[0].abs);
assert(src[1].file == BRW_IMMEDIATE_VALUE);

View file

@ -146,7 +146,6 @@ namespace {
* don't support 64-bit types at all.
*/
if ((!devinfo->has_64bit_int ||
devinfo->platform == INTEL_PLATFORM_CHV ||
intel_device_info_is_9lp(devinfo)) && type_sz(t) > 4)
return BRW_REGISTER_TYPE_UD;
else if (has_dst_aligned_region_restriction(devinfo, inst))

View file

@ -752,9 +752,7 @@ has_dst_aligned_region_restriction(const intel_device_info *devinfo,
if (type_sz(dst_type) > 4 || type_sz(exec_type) > 4 ||
(type_sz(exec_type) == 4 && is_dword_multiply))
return devinfo->platform == INTEL_PLATFORM_CHV ||
intel_device_info_is_9lp(devinfo) ||
devinfo->verx10 >= 125;
return intel_device_info_is_9lp(devinfo) || devinfo->verx10 >= 125;
else if (brw_reg_type_is_floating_point(dst_type))
return devinfo->verx10 >= 125;