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intel/blorp: Fix a hang caused by invalid dispatch enables on gfx7

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Because commit b9403b1c47 moved dispatch enable handling away from the
compiler, the drivers must ensure correct dispatch enable values. This
is handled by the intel_set_ps_dispatch_state function.

v2: Fix gfx6 build and use brw_fs_get_dispatch_enables for gfx6 in
crocus
v3: Rebase, use intel_set_ps_dispatch_state, drop gfx6 handling

Fixes: b9403b1c47 ("intel: factor out dispatch PS enabling logic")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20267>
This commit is contained in:
Väinö Mäkelä 2022-12-11 12:20:13 +02:00 • committed by Marge Bot
parent 7db1b94e07
commit 4c986c58b3
1 changed files with 3 additions and 3 deletions
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6
src/intel/blorp/blorp_genX_exec.h
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@ -933,6 +933,7 @@ blorp_emit_ps_config(struct blorp_batch *batch,
}
#elif GFX_VER >= 7
const struct intel_device_info *devinfo = batch->blorp->compiler->devinfo;
blorp_emit(batch, GENX(3DSTATE_WM), wm) {
switch (params->hiz_op) {
@ -979,9 +980,8 @@ blorp_emit_ps_config(struct blorp_batch *batch,
#endif
if (prog_data) {
ps._8PixelDispatchEnable = prog_data->dispatch_8;
ps._16PixelDispatchEnable = prog_data->dispatch_16;
ps._32PixelDispatchEnable = prog_data->dispatch_32;
intel_set_ps_dispatch_state(&ps, devinfo, prog_data,
params->num_samples);
ps.DispatchGRFStartRegisterForConstantSetupData0 =
brw_wm_prog_data_dispatch_grf_start_reg(prog_data, ps, 0);