From 4c986c58b3f2bf06ca17adb9bee0a79fa19bddd9 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?V=C3=A4in=C3=B6=20M=C3=A4kel=C3=A4?= Date: Sun, 11 Dec 2022 12:20:13 +0200 Subject: [PATCH] intel/blorp: Fix a hang caused by invalid dispatch enables on gfx7 Because commit b9403b1c477 moved dispatch enable handling away from the compiler, the drivers must ensure correct dispatch enable values. This is handled by the intel_set_ps_dispatch_state function. v2: Fix gfx6 build and use brw_fs_get_dispatch_enables for gfx6 in crocus v3: Rebase, use intel_set_ps_dispatch_state, drop gfx6 handling Fixes: b9403b1c477 ("intel: factor out dispatch PS enabling logic") Part-of: --- src/intel/blorp/blorp_genX_exec.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/src/intel/blorp/blorp_genX_exec.h b/src/intel/blorp/blorp_genX_exec.h index d7b3cb99bcd..3eec1f5859b 100644 --- a/src/intel/blorp/blorp_genX_exec.h +++ b/src/intel/blorp/blorp_genX_exec.h @@ -933,6 +933,7 @@ blorp_emit_ps_config(struct blorp_batch *batch, } #elif GFX_VER >= 7 + const struct intel_device_info *devinfo = batch->blorp->compiler->devinfo; blorp_emit(batch, GENX(3DSTATE_WM), wm) { switch (params->hiz_op) { @@ -979,9 +980,8 @@ blorp_emit_ps_config(struct blorp_batch *batch, #endif if (prog_data) { - ps._8PixelDispatchEnable = prog_data->dispatch_8; - ps._16PixelDispatchEnable = prog_data->dispatch_16; - ps._32PixelDispatchEnable = prog_data->dispatch_32; + intel_set_ps_dispatch_state(&ps, devinfo, prog_data, + params->num_samples); ps.DispatchGRFStartRegisterForConstantSetupData0 = brw_wm_prog_data_dispatch_grf_start_reg(prog_data, ps, 0);