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i965/fs: Use inst->eot rather than opcodes in register allocation.

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Previously, we special cased FB writes and URB writes in the register
allocation code.  What we really wanted was to handle any message with
EOT set.

This saves us from extending the list with new opcodes in the future.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
This commit is contained in:
Kenneth Graunke 2015-02-04 21:11:56 -08:00
parent 10d8a1a88e
commit 32f1d4e286
1 changed files with 10 additions and 11 deletions
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21
src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp
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@ -385,17 +385,6 @@ fs_visitor::setup_payload_interference(struct ra_graph *g,
/* Special case instructions which have extra implied registers used. */
switch (inst->opcode) {
case SHADER_OPCODE_URB_WRITE_SIMD8:
case FS_OPCODE_FB_WRITE:
/* We could omit this for the !inst->header_present case, except that
* the simulator apparently incorrectly reads from g0/g1 instead of
* sideband. It also really freaks out driver developers to see g0
* used in unusual places, so just always reserve it.
*/
payload_last_use_ip[0] = use_ip;
payload_last_use_ip[1] = use_ip;
break;
case FS_OPCODE_LINTERP:
/* On gen6+ in SIMD16, there are 4 adjacent registers used by
* PLN's sourcing of the deltas, while we list only the first one
@ -417,6 +406,16 @@ fs_visitor::setup_payload_interference(struct ra_graph *g,
break;
default:
if (inst->eot) {
/* We could omit this for the !inst->header_present case, except
* that the simulator apparently incorrectly reads from g0/g1
* instead of sideband. It also really freaks out driver
* developers to see g0 used in unusual places, so just always
* reserve it.
*/
payload_last_use_ip[0] = use_ip;
payload_last_use_ip[1] = use_ip;
}
break;
}