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i965/fs: Delete is_last_send(); just check inst->eot.

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This helper function basically just checks inst->eot, but also asserts
that only opcodes we expect to terminate threads have EOT set.  As far
as I'm aware, we've never had such a bug.

Removing it means that we don't have to extend the list for new opcodes.
Cherryview and Skylake introduce an optimization where sampler messages
can have EOT set; scalar GS/HS/DS will likely introduce new opcodes as
well.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
This commit is contained in:
Kenneth Graunke 2015-02-04 21:17:55 -08:00
parent a338dc0186
commit 10d8a1a88e
1 changed files with 1 additions and 14 deletions
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15
src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp
View file

@ -523,19 +523,6 @@ fs_visitor::setup_mrf_hack_interference(struct ra_graph *g, int first_mrf_node)
}
}
static bool
is_last_send(fs_inst *inst)
{
switch (inst->opcode) {
case SHADER_OPCODE_URB_WRITE_SIMD8:
case FS_OPCODE_FB_WRITE:
return inst->eot;
default:
assert(!inst->eot);
return false;
}
}
bool
fs_visitor::assign_regs(bool allow_spilling)
{
@ -608,7 +595,7 @@ fs_visitor::assign_regs(bool allow_spilling)
* We could just do "something high". Instead, we just pick the
* highest register that works.
*/
if (is_last_send(inst)) {
if (inst->eot) {
int size = virtual_grf_sizes[inst->src[0].reg];
int reg = screen->wm_reg_sets[rsi].class_to_ra_reg_range[size] - 1;
ra_set_node_reg(g, inst->src[0].reg, reg);