diff --git a/src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp b/src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp
index 8a14ce4a84d..bcd657b2172 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp
@@ -385,17 +385,6 @@ fs_visitor::setup_payload_interference(struct ra_graph *g,
 
       /* Special case instructions which have extra implied registers used. */
       switch (inst->opcode) {
-      case SHADER_OPCODE_URB_WRITE_SIMD8:
-      case FS_OPCODE_FB_WRITE:
-         /* We could omit this for the !inst->header_present case, except that
-          * the simulator apparently incorrectly reads from g0/g1 instead of
-          * sideband.  It also really freaks out driver developers to see g0
-          * used in unusual places, so just always reserve it.
-          */
-         payload_last_use_ip[0] = use_ip;
-         payload_last_use_ip[1] = use_ip;
-         break;
-
       case FS_OPCODE_LINTERP:
          /* On gen6+ in SIMD16, there are 4 adjacent registers used by
           * PLN's sourcing of the deltas, while we list only the first one
@@ -417,6 +406,16 @@ fs_visitor::setup_payload_interference(struct ra_graph *g,
          break;
 
       default:
+         if (inst->eot) {
+            /* We could omit this for the !inst->header_present case, except
+             * that the simulator apparently incorrectly reads from g0/g1
+             * instead of sideband.  It also really freaks out driver
+             * developers to see g0 used in unusual places, so just always
+             * reserve it.
+             */
+            payload_last_use_ip[0] = use_ip;
+            payload_last_use_ip[1] = use_ip;
+         }
          break;
       }