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r300: fix cycles counting for KIL

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We add a cycles penalty when we see a begin tex and than subtract from
it based on when first alu comes that needs the results. However if the
only instruction in the TEX block is just KIL, we don't have to add any
penalty as nothing waits for it.

Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28784>
This commit is contained in:
Pavel Ondračka 2024-04-17 12:26:06 +02:00
parent fcc97bd6c3
commit 32cc2c2812
1 changed files with 19 additions and 3 deletions
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22
src/gallium/drivers/r300/compiler/radeon_compiler.c
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@ -369,9 +369,25 @@ void rc_get_stats(struct radeon_compiler *c, struct rc_program_stats *s)
if (tmp->Type == RC_INSTRUCTION_NORMAL) {
info = rc_get_opcode_info(tmp->U.I.Opcode);
if (info->Opcode == RC_OPCODE_BEGIN_TEX) {
/* The R5xx docs mention ~30 cycles in section 8.3.1 */
s->num_cycles += 30;
last_begintex = ip;
/* The R5xx docs mention ~30 cycles in section 8.3.1
* The only case when we don't want to add the cycles
* penalty is when the texblock contains only kil.
*/
const struct rc_opcode_info *next_op
= rc_get_opcode_info(tmp->Next->U.I.Opcode);
struct rc_instruction *second_next_instr = tmp->Next->Next;
const struct rc_opcode_info *second_next_op;
if (second_next_instr->Type == RC_INSTRUCTION_NORMAL) {
second_next_op = rc_get_opcode_info(second_next_instr->U.I.Opcode);
} else {
second_next_op = rc_get_opcode_info(second_next_instr->U.P.RGB.Opcode);
}
if (next_op->Opcode != RC_OPCODE_KIL ||
(second_next_instr->Type == RC_INSTRUCTION_NORMAL &&
second_next_op->HasTexture)) {
s->num_cycles += 30;
last_begintex = ip;
}
continue;
}
if (info->Opcode == RC_OPCODE_MAD &&