From 32cc2c281257d8d23a5e7af962ea4cc625321cae Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Pavel=20Ondra=C4=8Dka?= Date: Wed, 17 Apr 2024 12:26:06 +0200 Subject: [PATCH] r300: fix cycles counting for KIL MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit We add a cycles penalty when we see a begin tex and than subtract from it based on when first alu comes that needs the results. However if the only instruction in the TEX block is just KIL, we don't have to add any penalty as nothing waits for it. Signed-off-by: Pavel Ondračka Part-of: --- .../drivers/r300/compiler/radeon_compiler.c | 22 ++++++++++++++++--- 1 file changed, 19 insertions(+), 3 deletions(-) diff --git a/src/gallium/drivers/r300/compiler/radeon_compiler.c b/src/gallium/drivers/r300/compiler/radeon_compiler.c index b38b99368a1..85ba7151d6c 100644 --- a/src/gallium/drivers/r300/compiler/radeon_compiler.c +++ b/src/gallium/drivers/r300/compiler/radeon_compiler.c @@ -369,9 +369,25 @@ void rc_get_stats(struct radeon_compiler *c, struct rc_program_stats *s) if (tmp->Type == RC_INSTRUCTION_NORMAL) { info = rc_get_opcode_info(tmp->U.I.Opcode); if (info->Opcode == RC_OPCODE_BEGIN_TEX) { - /* The R5xx docs mention ~30 cycles in section 8.3.1 */ - s->num_cycles += 30; - last_begintex = ip; + /* The R5xx docs mention ~30 cycles in section 8.3.1 + * The only case when we don't want to add the cycles + * penalty is when the texblock contains only kil. + */ + const struct rc_opcode_info *next_op + = rc_get_opcode_info(tmp->Next->U.I.Opcode); + struct rc_instruction *second_next_instr = tmp->Next->Next; + const struct rc_opcode_info *second_next_op; + if (second_next_instr->Type == RC_INSTRUCTION_NORMAL) { + second_next_op = rc_get_opcode_info(second_next_instr->U.I.Opcode); + } else { + second_next_op = rc_get_opcode_info(second_next_instr->U.P.RGB.Opcode); + } + if (next_op->Opcode != RC_OPCODE_KIL || + (second_next_instr->Type == RC_INSTRUCTION_NORMAL && + second_next_op->HasTexture)) { + s->num_cycles += 30; + last_begintex = ip; + } continue; } if (info->Opcode == RC_OPCODE_MAD &&