diff --git a/src/gallium/drivers/r300/compiler/radeon_compiler.c b/src/gallium/drivers/r300/compiler/radeon_compiler.c
index b38b99368a1..85ba7151d6c 100644
--- a/src/gallium/drivers/r300/compiler/radeon_compiler.c
+++ b/src/gallium/drivers/r300/compiler/radeon_compiler.c
@@ -369,9 +369,25 @@ void rc_get_stats(struct radeon_compiler *c, struct rc_program_stats *s)
 		if (tmp->Type == RC_INSTRUCTION_NORMAL) {
 			info = rc_get_opcode_info(tmp->U.I.Opcode);
 			if (info->Opcode == RC_OPCODE_BEGIN_TEX) {
-				/* The R5xx docs mention ~30 cycles in section 8.3.1 */
-				s->num_cycles += 30;
-				last_begintex = ip;
+				/* The R5xx docs mention ~30 cycles in section 8.3.1
+				 * The only case when we don't want to add the cycles
+				 * penalty is when the texblock contains only kil.
+				 */
+				const struct rc_opcode_info *next_op
+					= rc_get_opcode_info(tmp->Next->U.I.Opcode);
+				struct rc_instruction *second_next_instr = tmp->Next->Next;
+				const struct rc_opcode_info *second_next_op;
+				if (second_next_instr->Type == RC_INSTRUCTION_NORMAL) {
+					second_next_op = rc_get_opcode_info(second_next_instr->U.I.Opcode);
+				} else {
+					second_next_op = rc_get_opcode_info(second_next_instr->U.P.RGB.Opcode);
+				}
+				if (next_op->Opcode != RC_OPCODE_KIL ||
+					(second_next_instr->Type == RC_INSTRUCTION_NORMAL &&
+					 second_next_op->HasTexture)) {
+					s->num_cycles += 30;
+					last_begintex = ip;
+				}
 				continue;
 			}
 			if (info->Opcode == RC_OPCODE_MAD &&