2021-10-06 22:37:42 -07:00
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/*
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* Copyright © 2021 Intel Corporation
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2026-01-23 17:03:58 -08:00
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* SPDX-License-Identifier: MIT
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2021-10-06 22:37:42 -07:00
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*/
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#include "brw_private.h"
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#include "compiler/shader_info.h"
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#include "intel/dev/intel_debug.h"
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#include "intel/dev/intel_device_info.h"
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#include "util/ralloc.h"
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#include <gtest/gtest.h>
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enum {
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SIMD8 = 0,
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SIMD16 = 1,
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SIMD32 = 2,
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};
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const bool spilled = true;
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const bool not_spilled = false;
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class SIMDSelectionTest : public ::testing::Test {
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protected:
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SIMDSelectionTest()
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: mem_ctx(ralloc_context(NULL))
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, devinfo(rzalloc(mem_ctx, intel_device_info))
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, prog_data(rzalloc(mem_ctx, struct brw_cs_prog_data))
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, simd_state{
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.devinfo = devinfo,
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.prog_data = prog_data,
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}
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{
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process_intel_debug_variable();
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}
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~SIMDSelectionTest() {
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ralloc_free(mem_ctx);
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};
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void *mem_ctx;
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intel_device_info *devinfo;
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struct brw_cs_prog_data *prog_data;
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brw_simd_selection_state simd_state;
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};
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class SIMDSelectionCS : public SIMDSelectionTest {
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protected:
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SIMDSelectionCS() {
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prog_data->base.stage = MESA_SHADER_COMPUTE;
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prog_data->local_size[0] = 32;
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prog_data->local_size[1] = 1;
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prog_data->local_size[2] = 1;
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devinfo->max_cs_workgroup_threads = 64;
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}
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};
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TEST_F(SIMDSelectionCS, DefaultsToSIMD16)
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{
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ASSERT_TRUE(brw_simd_should_compile(simd_state, SIMD8));
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brw_simd_mark_compiled(simd_state, SIMD8, not_spilled);
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ASSERT_TRUE(brw_simd_should_compile(simd_state, SIMD16));
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brw_simd_mark_compiled(simd_state, SIMD16, not_spilled);
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ASSERT_FALSE(brw_simd_should_compile(simd_state, SIMD32));
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ASSERT_EQ(brw_simd_select(simd_state), SIMD16);
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}
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TEST_F(SIMDSelectionCS, TooBigFor16)
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{
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prog_data->local_size[0] = devinfo->max_cs_workgroup_threads;
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prog_data->local_size[1] = 32;
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prog_data->local_size[2] = 1;
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ASSERT_FALSE(brw_simd_should_compile(simd_state, SIMD8));
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ASSERT_FALSE(brw_simd_should_compile(simd_state, SIMD16));
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ASSERT_TRUE(brw_simd_should_compile(simd_state, SIMD32));
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brw_simd_mark_compiled(simd_state, SIMD32, spilled);
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ASSERT_EQ(brw_simd_select(simd_state), SIMD32);
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}
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TEST_F(SIMDSelectionCS, WorkgroupSize1)
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{
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prog_data->local_size[0] = 1;
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prog_data->local_size[1] = 1;
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prog_data->local_size[2] = 1;
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ASSERT_TRUE(brw_simd_should_compile(simd_state, SIMD8));
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brw_simd_mark_compiled(simd_state, SIMD8, not_spilled);
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ASSERT_FALSE(brw_simd_should_compile(simd_state, SIMD16));
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ASSERT_FALSE(brw_simd_should_compile(simd_state, SIMD32));
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ASSERT_EQ(brw_simd_select(simd_state), SIMD8);
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}
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TEST_F(SIMDSelectionCS, WorkgroupSize8)
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{
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prog_data->local_size[0] = 8;
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prog_data->local_size[1] = 1;
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prog_data->local_size[2] = 1;
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ASSERT_TRUE(brw_simd_should_compile(simd_state, SIMD8));
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brw_simd_mark_compiled(simd_state, SIMD8, not_spilled);
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ASSERT_FALSE(brw_simd_should_compile(simd_state, SIMD16));
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ASSERT_FALSE(brw_simd_should_compile(simd_state, SIMD32));
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ASSERT_EQ(brw_simd_select(simd_state), SIMD8);
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}
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TEST_F(SIMDSelectionCS, WorkgroupSizeVariable)
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{
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prog_data->local_size[0] = 0;
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prog_data->local_size[1] = 0;
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prog_data->local_size[2] = 0;
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ASSERT_TRUE(brw_simd_should_compile(simd_state, SIMD8));
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brw_simd_mark_compiled(simd_state, SIMD8, not_spilled);
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ASSERT_TRUE(brw_simd_should_compile(simd_state, SIMD16));
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brw_simd_mark_compiled(simd_state, SIMD16, not_spilled);
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ASSERT_TRUE(brw_simd_should_compile(simd_state, SIMD32));
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brw_simd_mark_compiled(simd_state, SIMD32, not_spilled);
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ASSERT_EQ(prog_data->prog_mask, 1u << SIMD8 | 1u << SIMD16 | 1u << SIMD32);
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const unsigned wg_8_1_1[] = { 8, 1, 1 };
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ASSERT_EQ(brw_simd_select_for_workgroup_size(devinfo, prog_data, wg_8_1_1), SIMD8);
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const unsigned wg_16_1_1[] = { 16, 1, 1 };
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ASSERT_EQ(brw_simd_select_for_workgroup_size(devinfo, prog_data, wg_16_1_1), SIMD16);
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const unsigned wg_32_1_1[] = { 32, 1, 1 };
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ASSERT_EQ(brw_simd_select_for_workgroup_size(devinfo, prog_data, wg_32_1_1), SIMD16);
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}
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TEST_F(SIMDSelectionCS, WorkgroupSizeVariableSpilled)
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{
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prog_data->local_size[0] = 0;
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prog_data->local_size[1] = 0;
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prog_data->local_size[2] = 0;
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ASSERT_TRUE(brw_simd_should_compile(simd_state, SIMD8));
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brw_simd_mark_compiled(simd_state, SIMD8, spilled);
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ASSERT_TRUE(brw_simd_should_compile(simd_state, SIMD16));
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brw_simd_mark_compiled(simd_state, SIMD16, spilled);
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ASSERT_TRUE(brw_simd_should_compile(simd_state, SIMD32));
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brw_simd_mark_compiled(simd_state, SIMD32, spilled);
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ASSERT_EQ(prog_data->prog_mask, 1u << SIMD8 | 1u << SIMD16 | 1u << SIMD32);
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const unsigned wg_8_1_1[] = { 8, 1, 1 };
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ASSERT_EQ(brw_simd_select_for_workgroup_size(devinfo, prog_data, wg_8_1_1), SIMD8);
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const unsigned wg_16_1_1[] = { 16, 1, 1 };
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ASSERT_EQ(brw_simd_select_for_workgroup_size(devinfo, prog_data, wg_16_1_1), SIMD8);
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const unsigned wg_32_1_1[] = { 32, 1, 1 };
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ASSERT_EQ(brw_simd_select_for_workgroup_size(devinfo, prog_data, wg_32_1_1), SIMD8);
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}
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TEST_F(SIMDSelectionCS, WorkgroupSizeVariableNoSIMD8)
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{
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prog_data->local_size[0] = 0;
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prog_data->local_size[1] = 0;
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prog_data->local_size[2] = 0;
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ASSERT_TRUE(brw_simd_should_compile(simd_state, SIMD8));
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ASSERT_TRUE(brw_simd_should_compile(simd_state, SIMD16));
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brw_simd_mark_compiled(simd_state, SIMD16, not_spilled);
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ASSERT_TRUE(brw_simd_should_compile(simd_state, SIMD32));
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brw_simd_mark_compiled(simd_state, SIMD32, not_spilled);
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ASSERT_EQ(prog_data->prog_mask, 1u << SIMD16 | 1u << SIMD32);
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const unsigned wg_8_1_1[] = { 8, 1, 1 };
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ASSERT_EQ(brw_simd_select_for_workgroup_size(devinfo, prog_data, wg_8_1_1), -1);
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const unsigned wg_16_1_1[] = { 16, 1, 1 };
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ASSERT_EQ(brw_simd_select_for_workgroup_size(devinfo, prog_data, wg_16_1_1), SIMD16);
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const unsigned wg_32_1_1[] = { 32, 1, 1 };
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ASSERT_EQ(brw_simd_select_for_workgroup_size(devinfo, prog_data, wg_32_1_1), SIMD16);
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}
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TEST_F(SIMDSelectionCS, WorkgroupSizeVariableNoSIMD16)
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{
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prog_data->local_size[0] = 0;
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prog_data->local_size[1] = 0;
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prog_data->local_size[2] = 0;
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ASSERT_TRUE(brw_simd_should_compile(simd_state, SIMD8));
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brw_simd_mark_compiled(simd_state, SIMD8, not_spilled);
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ASSERT_TRUE(brw_simd_should_compile(simd_state, SIMD16));
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ASSERT_TRUE(brw_simd_should_compile(simd_state, SIMD32));
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brw_simd_mark_compiled(simd_state, SIMD32, not_spilled);
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ASSERT_EQ(prog_data->prog_mask, 1u << SIMD8 | 1u << SIMD32);
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const unsigned wg_8_1_1[] = { 8, 1, 1 };
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ASSERT_EQ(brw_simd_select_for_workgroup_size(devinfo, prog_data, wg_8_1_1), SIMD8);
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const unsigned wg_16_1_1[] = { 16, 1, 1 };
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ASSERT_EQ(brw_simd_select_for_workgroup_size(devinfo, prog_data, wg_16_1_1), SIMD8);
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const unsigned wg_32_1_1[] = { 32, 1, 1 };
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ASSERT_EQ(brw_simd_select_for_workgroup_size(devinfo, prog_data, wg_32_1_1), SIMD8);
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}
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TEST_F(SIMDSelectionCS, WorkgroupSizeVariableNoSIMD8NoSIMD16)
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{
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prog_data->local_size[0] = 0;
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prog_data->local_size[1] = 0;
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prog_data->local_size[2] = 0;
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ASSERT_TRUE(brw_simd_should_compile(simd_state, SIMD8));
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ASSERT_TRUE(brw_simd_should_compile(simd_state, SIMD16));
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ASSERT_TRUE(brw_simd_should_compile(simd_state, SIMD32));
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brw_simd_mark_compiled(simd_state, SIMD32, not_spilled);
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ASSERT_EQ(prog_data->prog_mask, 1u << SIMD32);
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const unsigned wg_8_1_1[] = { 8, 1, 1 };
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ASSERT_EQ(brw_simd_select_for_workgroup_size(devinfo, prog_data, wg_8_1_1), -1);
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const unsigned wg_16_1_1[] = { 16, 1, 1 };
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ASSERT_EQ(brw_simd_select_for_workgroup_size(devinfo, prog_data, wg_16_1_1), -1);
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const unsigned wg_32_1_1[] = { 32, 1, 1 };
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ASSERT_EQ(brw_simd_select_for_workgroup_size(devinfo, prog_data, wg_32_1_1), SIMD32);
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}
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TEST_F(SIMDSelectionCS, SpillAtSIMD8)
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{
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ASSERT_TRUE(brw_simd_should_compile(simd_state, SIMD8));
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brw_simd_mark_compiled(simd_state, SIMD8, spilled);
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ASSERT_FALSE(brw_simd_should_compile(simd_state, SIMD16));
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ASSERT_FALSE(brw_simd_should_compile(simd_state, SIMD32));
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ASSERT_EQ(brw_simd_select(simd_state), SIMD8);
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}
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TEST_F(SIMDSelectionCS, SpillAtSIMD16)
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{
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ASSERT_TRUE(brw_simd_should_compile(simd_state, SIMD8));
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brw_simd_mark_compiled(simd_state, SIMD8, not_spilled);
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ASSERT_TRUE(brw_simd_should_compile(simd_state, SIMD16));
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brw_simd_mark_compiled(simd_state, SIMD16, spilled);
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ASSERT_FALSE(brw_simd_should_compile(simd_state, SIMD32));
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ASSERT_EQ(brw_simd_select(simd_state), SIMD8);
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}
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TEST_F(SIMDSelectionCS, EnvironmentVariable32)
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{
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2025-04-18 14:48:08 -07:00
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BITSET_SET(intel_debug, DEBUG_DO32);
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2021-10-06 22:37:42 -07:00
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2022-11-08 01:47:50 -08:00
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ASSERT_TRUE(brw_simd_should_compile(simd_state, SIMD8));
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brw_simd_mark_compiled(simd_state, SIMD8, not_spilled);
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ASSERT_TRUE(brw_simd_should_compile(simd_state, SIMD16));
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brw_simd_mark_compiled(simd_state, SIMD16, not_spilled);
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ASSERT_TRUE(brw_simd_should_compile(simd_state, SIMD32));
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brw_simd_mark_compiled(simd_state, SIMD32, not_spilled);
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2021-10-06 22:37:42 -07:00
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2022-11-08 01:47:50 -08:00
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ASSERT_EQ(brw_simd_select(simd_state), SIMD32);
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2021-10-06 22:37:42 -07:00
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}
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TEST_F(SIMDSelectionCS, EnvironmentVariable32ButSpills)
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{
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2025-04-18 14:48:08 -07:00
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BITSET_SET(intel_debug, DEBUG_DO32);
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2021-10-06 22:37:42 -07:00
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2022-11-08 01:47:50 -08:00
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ASSERT_TRUE(brw_simd_should_compile(simd_state, SIMD8));
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brw_simd_mark_compiled(simd_state, SIMD8, not_spilled);
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ASSERT_TRUE(brw_simd_should_compile(simd_state, SIMD16));
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brw_simd_mark_compiled(simd_state, SIMD16, not_spilled);
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ASSERT_TRUE(brw_simd_should_compile(simd_state, SIMD32));
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brw_simd_mark_compiled(simd_state, SIMD32, spilled);
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2021-10-06 22:37:42 -07:00
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2022-11-08 01:47:50 -08:00
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ASSERT_EQ(brw_simd_select(simd_state), SIMD16);
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2021-10-06 22:37:42 -07:00
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}
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TEST_F(SIMDSelectionCS, Require8)
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{
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2022-11-08 01:47:50 -08:00
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simd_state.required_width = 8;
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2021-10-06 22:37:42 -07:00
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2022-11-08 01:47:50 -08:00
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ASSERT_TRUE(brw_simd_should_compile(simd_state, SIMD8));
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brw_simd_mark_compiled(simd_state, SIMD8, not_spilled);
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ASSERT_FALSE(brw_simd_should_compile(simd_state, SIMD16));
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ASSERT_FALSE(brw_simd_should_compile(simd_state, SIMD32));
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2021-10-06 22:37:42 -07:00
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2022-11-08 01:47:50 -08:00
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ASSERT_EQ(brw_simd_select(simd_state), SIMD8);
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2021-10-06 22:37:42 -07:00
|
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}
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TEST_F(SIMDSelectionCS, Require8ErrorWhenNotCompile)
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|
{
|
2022-11-08 01:47:50 -08:00
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simd_state.required_width = 8;
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2021-10-06 22:37:42 -07:00
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2022-11-08 01:47:50 -08:00
|
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ASSERT_TRUE(brw_simd_should_compile(simd_state, SIMD8));
|
|
|
|
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ASSERT_FALSE(brw_simd_should_compile(simd_state, SIMD16));
|
|
|
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ASSERT_FALSE(brw_simd_should_compile(simd_state, SIMD32));
|
2021-10-06 22:37:42 -07:00
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|
|
2022-11-08 01:47:50 -08:00
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ASSERT_EQ(brw_simd_select(simd_state), -1);
|
2021-10-06 22:37:42 -07:00
|
|
|
}
|
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|
|
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TEST_F(SIMDSelectionCS, Require16)
|
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|
|
{
|
2022-11-08 01:47:50 -08:00
|
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|
simd_state.required_width = 16;
|
2021-10-06 22:37:42 -07:00
|
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|
|
2022-11-08 01:47:50 -08:00
|
|
|
ASSERT_FALSE(brw_simd_should_compile(simd_state, SIMD8));
|
|
|
|
|
ASSERT_TRUE(brw_simd_should_compile(simd_state, SIMD16));
|
|
|
|
|
brw_simd_mark_compiled(simd_state, SIMD16, not_spilled);
|
|
|
|
|
ASSERT_FALSE(brw_simd_should_compile(simd_state, SIMD32));
|
2021-10-06 22:37:42 -07:00
|
|
|
|
2022-11-08 01:47:50 -08:00
|
|
|
ASSERT_EQ(brw_simd_select(simd_state), SIMD16);
|
2021-10-06 22:37:42 -07:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
TEST_F(SIMDSelectionCS, Require16ErrorWhenNotCompile)
|
|
|
|
|
{
|
2022-11-08 01:47:50 -08:00
|
|
|
simd_state.required_width = 16;
|
2021-10-06 22:37:42 -07:00
|
|
|
|
2022-11-08 01:47:50 -08:00
|
|
|
ASSERT_FALSE(brw_simd_should_compile(simd_state, SIMD8));
|
|
|
|
|
ASSERT_TRUE(brw_simd_should_compile(simd_state, SIMD16));
|
|
|
|
|
ASSERT_FALSE(brw_simd_should_compile(simd_state, SIMD32));
|
2021-10-06 22:37:42 -07:00
|
|
|
|
2022-11-08 01:47:50 -08:00
|
|
|
ASSERT_EQ(brw_simd_select(simd_state), -1);
|
2021-10-06 22:37:42 -07:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
TEST_F(SIMDSelectionCS, Require32)
|
|
|
|
|
{
|
2022-11-08 01:47:50 -08:00
|
|
|
simd_state.required_width = 32;
|
2021-10-06 22:37:42 -07:00
|
|
|
|
2022-11-08 01:47:50 -08:00
|
|
|
ASSERT_FALSE(brw_simd_should_compile(simd_state, SIMD8));
|
|
|
|
|
ASSERT_FALSE(brw_simd_should_compile(simd_state, SIMD16));
|
|
|
|
|
ASSERT_TRUE(brw_simd_should_compile(simd_state, SIMD32));
|
|
|
|
|
brw_simd_mark_compiled(simd_state, SIMD32, not_spilled);
|
2021-10-06 22:37:42 -07:00
|
|
|
|
2022-11-08 01:47:50 -08:00
|
|
|
ASSERT_EQ(brw_simd_select(simd_state), SIMD32);
|
2021-10-06 22:37:42 -07:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
TEST_F(SIMDSelectionCS, Require32ErrorWhenNotCompile)
|
|
|
|
|
{
|
2022-11-08 01:47:50 -08:00
|
|
|
simd_state.required_width = 32;
|
2021-10-06 22:37:42 -07:00
|
|
|
|
2022-11-08 01:47:50 -08:00
|
|
|
ASSERT_FALSE(brw_simd_should_compile(simd_state, SIMD8));
|
|
|
|
|
ASSERT_FALSE(brw_simd_should_compile(simd_state, SIMD16));
|
|
|
|
|
ASSERT_TRUE(brw_simd_should_compile(simd_state, SIMD32));
|
2021-10-06 22:37:42 -07:00
|
|
|
|
2022-11-08 01:47:50 -08:00
|
|
|
ASSERT_EQ(brw_simd_select(simd_state), -1);
|
2021-10-06 22:37:42 -07:00
|
|
|
}
|
2022-11-08 03:38:18 -08:00
|
|
|
|
|
|
|
|
TEST_F(SIMDSelectionCS, FirstCompiledIsSIMD8)
|
|
|
|
|
{
|
|
|
|
|
ASSERT_TRUE(brw_simd_should_compile(simd_state, SIMD8));
|
|
|
|
|
brw_simd_mark_compiled(simd_state, SIMD8, not_spilled);
|
|
|
|
|
|
|
|
|
|
ASSERT_TRUE(brw_simd_any_compiled(simd_state));
|
|
|
|
|
ASSERT_EQ(brw_simd_first_compiled(simd_state), SIMD8);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
TEST_F(SIMDSelectionCS, FirstCompiledIsSIMD16)
|
|
|
|
|
{
|
|
|
|
|
ASSERT_TRUE(brw_simd_should_compile(simd_state, SIMD8));
|
|
|
|
|
ASSERT_TRUE(brw_simd_should_compile(simd_state, SIMD16));
|
|
|
|
|
brw_simd_mark_compiled(simd_state, SIMD16, not_spilled);
|
|
|
|
|
|
|
|
|
|
ASSERT_TRUE(brw_simd_any_compiled(simd_state));
|
|
|
|
|
ASSERT_EQ(brw_simd_first_compiled(simd_state), SIMD16);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
TEST_F(SIMDSelectionCS, FirstCompiledIsSIMD32)
|
|
|
|
|
{
|
|
|
|
|
ASSERT_TRUE(brw_simd_should_compile(simd_state, SIMD8));
|
|
|
|
|
ASSERT_TRUE(brw_simd_should_compile(simd_state, SIMD16));
|
|
|
|
|
ASSERT_TRUE(brw_simd_should_compile(simd_state, SIMD32));
|
|
|
|
|
brw_simd_mark_compiled(simd_state, SIMD32, not_spilled);
|
|
|
|
|
|
|
|
|
|
ASSERT_TRUE(brw_simd_any_compiled(simd_state));
|
|
|
|
|
ASSERT_EQ(brw_simd_first_compiled(simd_state), SIMD32);
|
|
|
|
|
}
|