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intel/compiler: Create a struct to hold SIMD selection state
This is a preparation to decouple the storage of what SIMDs compiled/spilled from the cs_prog_data. This will allow reuse of SIMD selection code by Bindless Shaders. And since we have a struct now, move the error array there so reduce the boilerplate of the users. Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Ivan Briano <ivan.briano@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19601>
This commit is contained in:
parent
8cda6cd774
commit
a0580dadfd
5 changed files with 208 additions and 192 deletions
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@ -7806,15 +7806,17 @@ brw_compile_cs(const struct brw_compiler *compiler,
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prog_data->local_size[2] = nir->info.workgroup_size[2];
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}
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const unsigned required_dispatch_width =
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brw_required_dispatch_width(&nir->info);
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brw_simd_selection_state simd_state{
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.mem_ctx = mem_ctx,
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.devinfo = compiler->devinfo,
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.prog_data = prog_data,
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.required_width = brw_required_dispatch_width(&nir->info),
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};
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std::unique_ptr<fs_visitor> v[3];
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const char *error[3] = {0};
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for (unsigned simd = 0; simd < 3; simd++) {
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if (!brw_simd_should_compile(mem_ctx, simd, compiler->devinfo, prog_data,
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required_dispatch_width, &error[simd]))
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if (!brw_simd_should_compile(simd_state, simd))
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continue;
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const unsigned dispatch_width = 8u << simd;
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@ -7847,9 +7849,9 @@ brw_compile_cs(const struct brw_compiler *compiler,
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if (v[simd]->run_cs(allow_spilling)) {
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cs_fill_push_const_info(compiler->devinfo, prog_data);
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brw_simd_mark_compiled(simd, prog_data, v[simd]->spilled_any_registers);
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brw_simd_mark_compiled(simd_state, simd, v[simd]->spilled_any_registers);
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} else {
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error[simd] = ralloc_strdup(mem_ctx, v[simd]->fail_msg);
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simd_state.error[simd] = ralloc_strdup(mem_ctx, v[simd]->fail_msg);
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if (simd > 0) {
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brw_shader_perf_log(compiler, params->log_data,
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"SIMD%u shader failed to compile: %s\n",
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@ -7858,10 +7860,11 @@ brw_compile_cs(const struct brw_compiler *compiler,
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}
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}
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const int selected_simd = brw_simd_select(prog_data);
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const int selected_simd = brw_simd_select(simd_state);
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if (selected_simd < 0) {
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params->error_str = ralloc_asprintf(mem_ctx, "Can't compile shader: %s, %s and %s.\n",
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error[0], error[1], error[2]);;
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simd_state.error[0], simd_state.error[1],
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simd_state.error[2]);
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return NULL;
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}
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@ -265,15 +265,17 @@ brw_compile_task(const struct brw_compiler *compiler,
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prog_data->uses_drawid =
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BITSET_TEST(nir->info.system_values_read, SYSTEM_VALUE_DRAW_ID);
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const unsigned required_dispatch_width =
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brw_required_dispatch_width(&nir->info);
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brw_simd_selection_state simd_state{
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.mem_ctx = mem_ctx,
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.devinfo = compiler->devinfo,
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.prog_data = &prog_data->base,
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.required_width = brw_required_dispatch_width(&nir->info),
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};
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std::unique_ptr<fs_visitor> v[3];
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const char *error[3] = {0};
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for (unsigned simd = 0; simd < 3; simd++) {
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if (!brw_simd_should_compile(mem_ctx, simd, compiler->devinfo, &prog_data->base,
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required_dispatch_width, &error[simd]))
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if (!brw_simd_should_compile(simd_state, simd))
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continue;
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const unsigned dispatch_width = 8 << simd;
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@ -301,15 +303,16 @@ brw_compile_task(const struct brw_compiler *compiler,
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const bool allow_spilling = !prog_data->base.prog_mask;
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if (v[simd]->run_task(allow_spilling))
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brw_simd_mark_compiled(simd, &prog_data->base, v[simd]->spilled_any_registers);
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brw_simd_mark_compiled(simd_state, simd, v[simd]->spilled_any_registers);
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else
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error[simd] = ralloc_strdup(mem_ctx, v[simd]->fail_msg);
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simd_state.error[simd] = ralloc_strdup(mem_ctx, v[simd]->fail_msg);
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}
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int selected_simd = brw_simd_select(&prog_data->base);
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int selected_simd = brw_simd_select(simd_state);
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if (selected_simd < 0) {
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params->error_str = ralloc_asprintf(mem_ctx, "Can't compile shader: %s, %s and %s.\n",
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error[0], error[1], error[2]);;
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simd_state.error[0], simd_state.error[1],
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simd_state.error[2]);
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return NULL;
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}
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@ -761,15 +764,17 @@ brw_compile_mesh(const struct brw_compiler *compiler,
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brw_compute_mue_map(nir, &prog_data->map);
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brw_nir_lower_mue_outputs(nir, &prog_data->map);
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const unsigned required_dispatch_width =
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brw_required_dispatch_width(&nir->info);
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brw_simd_selection_state simd_state{
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.mem_ctx = mem_ctx,
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.devinfo = compiler->devinfo,
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.prog_data = &prog_data->base,
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.required_width = brw_required_dispatch_width(&nir->info),
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};
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std::unique_ptr<fs_visitor> v[3];
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const char *error[3] = {0};
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for (int simd = 0; simd < 3; simd++) {
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if (!brw_simd_should_compile(mem_ctx, simd, compiler->devinfo, &prog_data->base,
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required_dispatch_width, &error[simd]))
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if (!brw_simd_should_compile(simd_state, simd))
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continue;
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const unsigned dispatch_width = 8 << simd;
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@ -809,15 +814,16 @@ brw_compile_mesh(const struct brw_compiler *compiler,
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const bool allow_spilling = !prog_data->base.prog_mask;
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if (v[simd]->run_mesh(allow_spilling))
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brw_simd_mark_compiled(simd, &prog_data->base, v[simd]->spilled_any_registers);
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brw_simd_mark_compiled(simd_state, simd, v[simd]->spilled_any_registers);
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else
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error[simd] = ralloc_strdup(mem_ctx, v[simd]->fail_msg);
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simd_state.error[simd] = ralloc_strdup(mem_ctx, v[simd]->fail_msg);
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}
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int selected_simd = brw_simd_select(&prog_data->base);
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int selected_simd = brw_simd_select(simd_state);
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if (selected_simd < 0) {
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params->error_str = ralloc_asprintf(mem_ctx, "Can't compile shader: %s, %s and %s.\n",
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error[0], error[1], error[2]);;
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simd_state.error[0], simd_state.error[1],
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simd_state.error[2]);;
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return NULL;
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}
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@ -29,18 +29,22 @@
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unsigned brw_required_dispatch_width(const struct shader_info *info);
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bool brw_simd_should_compile(void *mem_ctx,
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unsigned simd,
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const struct intel_device_info *devinfo,
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struct brw_cs_prog_data *prog_data,
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unsigned required_dispatch_width,
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const char **error);
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struct brw_simd_selection_state {
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void *mem_ctx;
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const struct intel_device_info *devinfo;
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void brw_simd_mark_compiled(unsigned simd,
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struct brw_cs_prog_data *prog_data,
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bool spilled);
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struct brw_cs_prog_data *prog_data;
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int brw_simd_select(const struct brw_cs_prog_data *prog_data);
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unsigned required_width;
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const char *error[3];
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};
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bool brw_simd_should_compile(brw_simd_selection_state &state, unsigned simd);
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void brw_simd_mark_compiled(brw_simd_selection_state &state, unsigned simd, bool spilled);
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int brw_simd_select(const brw_simd_selection_state &state);
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int brw_simd_select_for_workgroup_size(const struct intel_device_info *devinfo,
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const struct brw_cs_prog_data *prog_data,
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@ -47,16 +47,11 @@ test_bit(unsigned mask, unsigned bit) {
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}
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bool
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brw_simd_should_compile(void *mem_ctx,
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unsigned simd,
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const struct intel_device_info *devinfo,
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struct brw_cs_prog_data *prog_data,
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unsigned required,
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const char **error)
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brw_simd_should_compile(brw_simd_selection_state &state,
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unsigned simd)
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{
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struct brw_cs_prog_data *prog_data = state.prog_data;
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assert(!test_bit(prog_data->prog_mask, simd));
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assert(error);
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const unsigned width = 8u << simd;
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@ -68,8 +63,8 @@ brw_simd_should_compile(void *mem_ctx,
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if (!workgroup_size_variable) {
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if (test_bit(prog_data->prog_spilled, simd)) {
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*error = ralloc_asprintf(
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mem_ctx, "SIMD%u skipped because would spill", width);
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state.error[simd] = ralloc_asprintf(
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state.mem_ctx, "SIMD%u skipped because would spill", width);
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return false;
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}
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@ -77,26 +72,26 @@ brw_simd_should_compile(void *mem_ctx,
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prog_data->local_size[1] *
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prog_data->local_size[2];
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unsigned max_threads = devinfo->max_cs_workgroup_threads;
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unsigned max_threads = state.devinfo->max_cs_workgroup_threads;
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if (required && required != width) {
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*error = ralloc_asprintf(
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mem_ctx, "SIMD%u skipped because required dispatch width is %u",
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width, required);
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if (state.required_width && state.required_width != width) {
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state.error[simd] = ralloc_asprintf(
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state.mem_ctx, "SIMD%u skipped because required dispatch width is %u",
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width, state.required_width);
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return false;
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}
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if (simd > 0 && test_bit(prog_data->prog_mask, simd - 1) &&
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workgroup_size <= (width / 2)) {
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*error = ralloc_asprintf(
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mem_ctx, "SIMD%u skipped because workgroup size %u already fits in SIMD%u",
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state.error[simd] = ralloc_asprintf(
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state.mem_ctx, "SIMD%u skipped because workgroup size %u already fits in SIMD%u",
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width, workgroup_size, width / 2);
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return false;
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}
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if (DIV_ROUND_UP(workgroup_size, width) > max_threads) {
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*error = ralloc_asprintf(
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mem_ctx, "SIMD%u can't fit all %u invocations in %u threads",
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state.error[simd] = ralloc_asprintf(
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state.mem_ctx, "SIMD%u can't fit all %u invocations in %u threads",
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width, workgroup_size, max_threads);
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return false;
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}
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@ -107,23 +102,23 @@ brw_simd_should_compile(void *mem_ctx,
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*/
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if (width == 32) {
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if (!INTEL_DEBUG(DEBUG_DO32) && prog_data->prog_mask) {
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*error = ralloc_strdup(
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mem_ctx, "SIMD32 skipped because not required");
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state.error[simd] = ralloc_strdup(
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state.mem_ctx, "SIMD32 skipped because not required");
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return false;
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}
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}
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}
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if (width == 32 && prog_data->base.ray_queries > 0) {
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*error = ralloc_asprintf(
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mem_ctx, "SIMD%u skipped because of ray queries",
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state.error[simd] = ralloc_asprintf(
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state.mem_ctx, "SIMD%u skipped because of ray queries",
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width);
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return false;
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}
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if (width == 32 && prog_data->uses_btd_stack_ids) {
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*error = ralloc_asprintf(
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mem_ctx, "SIMD%u skipped because of bindless shader calls",
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state.error[simd] = ralloc_asprintf(
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state.mem_ctx, "SIMD%u skipped because of bindless shader calls",
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width);
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return false;
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}
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@ -135,8 +130,8 @@ brw_simd_should_compile(void *mem_ctx,
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};
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if (unlikely(env_skip[simd])) {
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*error = ralloc_asprintf(
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mem_ctx, "SIMD%u skipped because INTEL_DEBUG=no%u",
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state.error[simd] = ralloc_asprintf(
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state.mem_ctx, "SIMD%u skipped because INTEL_DEBUG=no%u",
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width, width);
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return false;
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}
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@ -145,8 +140,9 @@ brw_simd_should_compile(void *mem_ctx,
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}
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void
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brw_simd_mark_compiled(unsigned simd, struct brw_cs_prog_data *prog_data, bool spilled)
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brw_simd_mark_compiled(brw_simd_selection_state &state, unsigned simd, bool spilled)
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{
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struct brw_cs_prog_data *prog_data = state.prog_data;
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assert(!test_bit(prog_data->prog_mask, simd));
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prog_data->prog_mask |= 1u << simd;
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@ -159,8 +155,9 @@ brw_simd_mark_compiled(unsigned simd, struct brw_cs_prog_data *prog_data, bool s
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}
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int
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brw_simd_select(const struct brw_cs_prog_data *prog_data)
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brw_simd_select(const struct brw_simd_selection_state &state)
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{
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const struct brw_cs_prog_data *prog_data = state.prog_data;
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assert((prog_data->prog_mask & ~0x7u) == 0);
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const unsigned not_spilled_mask =
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prog_data->prog_mask & ~prog_data->prog_spilled;
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@ -182,10 +179,12 @@ brw_simd_select_for_workgroup_size(const struct intel_device_info *devinfo,
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{
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if (!sizes || (prog_data->local_size[0] == sizes[0] &&
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prog_data->local_size[1] == sizes[1] &&
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prog_data->local_size[2] == sizes[2]))
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return brw_simd_select(prog_data);
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void *mem_ctx = ralloc_context(NULL);
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prog_data->local_size[2] == sizes[2])) {
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const brw_simd_selection_state simd_state{
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.prog_data = const_cast<struct brw_cs_prog_data *>(prog_data),
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};
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return brw_simd_select(simd_state);
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}
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struct brw_cs_prog_data cloned = *prog_data;
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for (unsigned i = 0; i < 3; i++)
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@ -194,20 +193,25 @@ brw_simd_select_for_workgroup_size(const struct intel_device_info *devinfo,
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cloned.prog_mask = 0;
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cloned.prog_spilled = 0;
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const char *error[3] = {0};
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void *mem_ctx = ralloc_context(NULL);
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brw_simd_selection_state simd_state{
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.mem_ctx = mem_ctx,
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.devinfo = devinfo,
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.prog_data = &cloned,
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};
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for (unsigned simd = 0; simd < 3; simd++) {
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/* We are not recompiling, so use original results of prog_mask and
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* prog_spilled as they will already contain all possible compilations.
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*/
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if (brw_simd_should_compile(mem_ctx, simd, devinfo, &cloned,
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0 /* required_dispatch_width */, &error[simd]) &&
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if (brw_simd_should_compile(simd_state, simd) &&
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test_bit(prog_data->prog_mask, simd)) {
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brw_simd_mark_compiled(simd, &cloned, test_bit(prog_data->prog_spilled, simd));
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brw_simd_mark_compiled(simd_state, simd, test_bit(prog_data->prog_spilled, simd));
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}
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}
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ralloc_free(mem_ctx);
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return brw_simd_select(&cloned);
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return brw_simd_select(simd_state);
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}
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@ -41,27 +41,26 @@ const bool not_spilled = false;
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class SIMDSelectionTest : public ::testing::Test {
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protected:
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SIMDSelectionTest() : error{NULL, NULL, NULL} {
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mem_ctx = ralloc_context(NULL);
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devinfo = rzalloc(mem_ctx, intel_device_info);
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prog_data = rzalloc(mem_ctx, struct brw_cs_prog_data);
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required_dispatch_width = 0;
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SIMDSelectionTest()
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: mem_ctx(ralloc_context(NULL))
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, devinfo(rzalloc(mem_ctx, intel_device_info))
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, prog_data(rzalloc(mem_ctx, struct brw_cs_prog_data))
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, simd_state{
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.mem_ctx = mem_ctx,
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.devinfo = devinfo,
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.prog_data = prog_data,
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}
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{
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}
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~SIMDSelectionTest() {
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ralloc_free(mem_ctx);
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};
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bool should_compile(unsigned simd) {
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return brw_simd_should_compile(mem_ctx, simd, devinfo, prog_data,
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required_dispatch_width, &error[simd]);
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}
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void *mem_ctx;
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intel_device_info *devinfo;
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struct brw_cs_prog_data *prog_data;
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const char *error[3];
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unsigned required_dispatch_width;
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brw_simd_selection_state simd_state;
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};
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class SIMDSelectionCS : public SIMDSelectionTest {
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@ -78,13 +77,13 @@ protected:
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|
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TEST_F(SIMDSelectionCS, DefaultsToSIMD16)
|
||||
{
|
||||
ASSERT_TRUE(should_compile(SIMD8));
|
||||
brw_simd_mark_compiled(SIMD8, prog_data, not_spilled);
|
||||
ASSERT_TRUE(should_compile(SIMD16));
|
||||
brw_simd_mark_compiled(SIMD16, prog_data, not_spilled);
|
||||
ASSERT_FALSE(should_compile(SIMD32));
|
||||
ASSERT_TRUE(brw_simd_should_compile(simd_state, SIMD8));
|
||||
brw_simd_mark_compiled(simd_state, SIMD8, not_spilled);
|
||||
ASSERT_TRUE(brw_simd_should_compile(simd_state, SIMD16));
|
||||
brw_simd_mark_compiled(simd_state, SIMD16, not_spilled);
|
||||
ASSERT_FALSE(brw_simd_should_compile(simd_state, SIMD32));
|
||||
|
||||
ASSERT_EQ(brw_simd_select(prog_data), SIMD16);
|
||||
ASSERT_EQ(brw_simd_select(simd_state), SIMD16);
|
||||
}
|
||||
|
||||
TEST_F(SIMDSelectionCS, TooBigFor16)
|
||||
|
|
@ -93,12 +92,12 @@ TEST_F(SIMDSelectionCS, TooBigFor16)
|
|||
prog_data->local_size[1] = 32;
|
||||
prog_data->local_size[2] = 1;
|
||||
|
||||
ASSERT_FALSE(should_compile(SIMD8));
|
||||
ASSERT_FALSE(should_compile(SIMD16));
|
||||
ASSERT_TRUE(should_compile(SIMD32));
|
||||
brw_simd_mark_compiled(SIMD32, prog_data, spilled);
|
||||
ASSERT_FALSE(brw_simd_should_compile(simd_state, SIMD8));
|
||||
ASSERT_FALSE(brw_simd_should_compile(simd_state, SIMD16));
|
||||
ASSERT_TRUE(brw_simd_should_compile(simd_state, SIMD32));
|
||||
brw_simd_mark_compiled(simd_state, SIMD32, spilled);
|
||||
|
||||
ASSERT_EQ(brw_simd_select(prog_data), SIMD32);
|
||||
ASSERT_EQ(brw_simd_select(simd_state), SIMD32);
|
||||
}
|
||||
|
||||
TEST_F(SIMDSelectionCS, WorkgroupSize1)
|
||||
|
|
@ -107,12 +106,12 @@ TEST_F(SIMDSelectionCS, WorkgroupSize1)
|
|||
prog_data->local_size[1] = 1;
|
||||
prog_data->local_size[2] = 1;
|
||||
|
||||
ASSERT_TRUE(should_compile(SIMD8));
|
||||
brw_simd_mark_compiled(SIMD8, prog_data, not_spilled);
|
||||
ASSERT_FALSE(should_compile(SIMD16));
|
||||
ASSERT_FALSE(should_compile(SIMD32));
|
||||
ASSERT_TRUE(brw_simd_should_compile(simd_state, SIMD8));
|
||||
brw_simd_mark_compiled(simd_state, SIMD8, not_spilled);
|
||||
ASSERT_FALSE(brw_simd_should_compile(simd_state, SIMD16));
|
||||
ASSERT_FALSE(brw_simd_should_compile(simd_state, SIMD32));
|
||||
|
||||
ASSERT_EQ(brw_simd_select(prog_data), SIMD8);
|
||||
ASSERT_EQ(brw_simd_select(simd_state), SIMD8);
|
||||
}
|
||||
|
||||
TEST_F(SIMDSelectionCS, WorkgroupSize8)
|
||||
|
|
@ -121,12 +120,12 @@ TEST_F(SIMDSelectionCS, WorkgroupSize8)
|
|||
prog_data->local_size[1] = 1;
|
||||
prog_data->local_size[2] = 1;
|
||||
|
||||
ASSERT_TRUE(should_compile(SIMD8));
|
||||
brw_simd_mark_compiled(SIMD8, prog_data, not_spilled);
|
||||
ASSERT_FALSE(should_compile(SIMD16));
|
||||
ASSERT_FALSE(should_compile(SIMD32));
|
||||
ASSERT_TRUE(brw_simd_should_compile(simd_state, SIMD8));
|
||||
brw_simd_mark_compiled(simd_state, SIMD8, not_spilled);
|
||||
ASSERT_FALSE(brw_simd_should_compile(simd_state, SIMD16));
|
||||
ASSERT_FALSE(brw_simd_should_compile(simd_state, SIMD32));
|
||||
|
||||
ASSERT_EQ(brw_simd_select(prog_data), SIMD8);
|
||||
ASSERT_EQ(brw_simd_select(simd_state), SIMD8);
|
||||
}
|
||||
|
||||
TEST_F(SIMDSelectionCS, WorkgroupSizeVariable)
|
||||
|
|
@ -135,12 +134,12 @@ TEST_F(SIMDSelectionCS, WorkgroupSizeVariable)
|
|||
prog_data->local_size[1] = 0;
|
||||
prog_data->local_size[2] = 0;
|
||||
|
||||
ASSERT_TRUE(should_compile(SIMD8));
|
||||
brw_simd_mark_compiled(SIMD8, prog_data, not_spilled);
|
||||
ASSERT_TRUE(should_compile(SIMD16));
|
||||
brw_simd_mark_compiled(SIMD16, prog_data, not_spilled);
|
||||
ASSERT_TRUE(should_compile(SIMD32));
|
||||
brw_simd_mark_compiled(SIMD32, prog_data, not_spilled);
|
||||
ASSERT_TRUE(brw_simd_should_compile(simd_state, SIMD8));
|
||||
brw_simd_mark_compiled(simd_state, SIMD8, not_spilled);
|
||||
ASSERT_TRUE(brw_simd_should_compile(simd_state, SIMD16));
|
||||
brw_simd_mark_compiled(simd_state, SIMD16, not_spilled);
|
||||
ASSERT_TRUE(brw_simd_should_compile(simd_state, SIMD32));
|
||||
brw_simd_mark_compiled(simd_state, SIMD32, not_spilled);
|
||||
|
||||
ASSERT_EQ(prog_data->prog_mask, 1u << SIMD8 | 1u << SIMD16 | 1u << SIMD32);
|
||||
|
||||
|
|
@ -160,12 +159,12 @@ TEST_F(SIMDSelectionCS, WorkgroupSizeVariableSpilled)
|
|||
prog_data->local_size[1] = 0;
|
||||
prog_data->local_size[2] = 0;
|
||||
|
||||
ASSERT_TRUE(should_compile(SIMD8));
|
||||
brw_simd_mark_compiled(SIMD8, prog_data, spilled);
|
||||
ASSERT_TRUE(should_compile(SIMD16));
|
||||
brw_simd_mark_compiled(SIMD16, prog_data, spilled);
|
||||
ASSERT_TRUE(should_compile(SIMD32));
|
||||
brw_simd_mark_compiled(SIMD32, prog_data, spilled);
|
||||
ASSERT_TRUE(brw_simd_should_compile(simd_state, SIMD8));
|
||||
brw_simd_mark_compiled(simd_state, SIMD8, spilled);
|
||||
ASSERT_TRUE(brw_simd_should_compile(simd_state, SIMD16));
|
||||
brw_simd_mark_compiled(simd_state, SIMD16, spilled);
|
||||
ASSERT_TRUE(brw_simd_should_compile(simd_state, SIMD32));
|
||||
brw_simd_mark_compiled(simd_state, SIMD32, spilled);
|
||||
|
||||
ASSERT_EQ(prog_data->prog_mask, 1u << SIMD8 | 1u << SIMD16 | 1u << SIMD32);
|
||||
|
||||
|
|
@ -185,11 +184,11 @@ TEST_F(SIMDSelectionCS, WorkgroupSizeVariableNoSIMD8)
|
|||
prog_data->local_size[1] = 0;
|
||||
prog_data->local_size[2] = 0;
|
||||
|
||||
ASSERT_TRUE(should_compile(SIMD8));
|
||||
ASSERT_TRUE(should_compile(SIMD16));
|
||||
brw_simd_mark_compiled(SIMD16, prog_data, not_spilled);
|
||||
ASSERT_TRUE(should_compile(SIMD32));
|
||||
brw_simd_mark_compiled(SIMD32, prog_data, not_spilled);
|
||||
ASSERT_TRUE(brw_simd_should_compile(simd_state, SIMD8));
|
||||
ASSERT_TRUE(brw_simd_should_compile(simd_state, SIMD16));
|
||||
brw_simd_mark_compiled(simd_state, SIMD16, not_spilled);
|
||||
ASSERT_TRUE(brw_simd_should_compile(simd_state, SIMD32));
|
||||
brw_simd_mark_compiled(simd_state, SIMD32, not_spilled);
|
||||
|
||||
ASSERT_EQ(prog_data->prog_mask, 1u << SIMD16 | 1u << SIMD32);
|
||||
|
||||
|
|
@ -209,11 +208,11 @@ TEST_F(SIMDSelectionCS, WorkgroupSizeVariableNoSIMD16)
|
|||
prog_data->local_size[1] = 0;
|
||||
prog_data->local_size[2] = 0;
|
||||
|
||||
ASSERT_TRUE(should_compile(SIMD8));
|
||||
brw_simd_mark_compiled(SIMD8, prog_data, not_spilled);
|
||||
ASSERT_TRUE(should_compile(SIMD16));
|
||||
ASSERT_TRUE(should_compile(SIMD32));
|
||||
brw_simd_mark_compiled(SIMD32, prog_data, not_spilled);
|
||||
ASSERT_TRUE(brw_simd_should_compile(simd_state, SIMD8));
|
||||
brw_simd_mark_compiled(simd_state, SIMD8, not_spilled);
|
||||
ASSERT_TRUE(brw_simd_should_compile(simd_state, SIMD16));
|
||||
ASSERT_TRUE(brw_simd_should_compile(simd_state, SIMD32));
|
||||
brw_simd_mark_compiled(simd_state, SIMD32, not_spilled);
|
||||
|
||||
ASSERT_EQ(prog_data->prog_mask, 1u << SIMD8 | 1u << SIMD32);
|
||||
|
||||
|
|
@ -233,10 +232,10 @@ TEST_F(SIMDSelectionCS, WorkgroupSizeVariableNoSIMD8NoSIMD16)
|
|||
prog_data->local_size[1] = 0;
|
||||
prog_data->local_size[2] = 0;
|
||||
|
||||
ASSERT_TRUE(should_compile(SIMD8));
|
||||
ASSERT_TRUE(should_compile(SIMD16));
|
||||
ASSERT_TRUE(should_compile(SIMD32));
|
||||
brw_simd_mark_compiled(SIMD32, prog_data, not_spilled);
|
||||
ASSERT_TRUE(brw_simd_should_compile(simd_state, SIMD8));
|
||||
ASSERT_TRUE(brw_simd_should_compile(simd_state, SIMD16));
|
||||
ASSERT_TRUE(brw_simd_should_compile(simd_state, SIMD32));
|
||||
brw_simd_mark_compiled(simd_state, SIMD32, not_spilled);
|
||||
|
||||
ASSERT_EQ(prog_data->prog_mask, 1u << SIMD32);
|
||||
|
||||
|
|
@ -252,118 +251,118 @@ TEST_F(SIMDSelectionCS, WorkgroupSizeVariableNoSIMD8NoSIMD16)
|
|||
|
||||
TEST_F(SIMDSelectionCS, SpillAtSIMD8)
|
||||
{
|
||||
ASSERT_TRUE(should_compile(SIMD8));
|
||||
brw_simd_mark_compiled(SIMD8, prog_data, spilled);
|
||||
ASSERT_FALSE(should_compile(SIMD16));
|
||||
ASSERT_FALSE(should_compile(SIMD32));
|
||||
ASSERT_TRUE(brw_simd_should_compile(simd_state, SIMD8));
|
||||
brw_simd_mark_compiled(simd_state, SIMD8, spilled);
|
||||
ASSERT_FALSE(brw_simd_should_compile(simd_state, SIMD16));
|
||||
ASSERT_FALSE(brw_simd_should_compile(simd_state, SIMD32));
|
||||
|
||||
ASSERT_EQ(brw_simd_select(prog_data), SIMD8);
|
||||
ASSERT_EQ(brw_simd_select(simd_state), SIMD8);
|
||||
}
|
||||
|
||||
TEST_F(SIMDSelectionCS, SpillAtSIMD16)
|
||||
{
|
||||
ASSERT_TRUE(should_compile(SIMD8));
|
||||
brw_simd_mark_compiled(SIMD8, prog_data, not_spilled);
|
||||
ASSERT_TRUE(should_compile(SIMD16));
|
||||
brw_simd_mark_compiled(SIMD16, prog_data, spilled);
|
||||
ASSERT_FALSE(should_compile(SIMD32));
|
||||
ASSERT_TRUE(brw_simd_should_compile(simd_state, SIMD8));
|
||||
brw_simd_mark_compiled(simd_state, SIMD8, not_spilled);
|
||||
ASSERT_TRUE(brw_simd_should_compile(simd_state, SIMD16));
|
||||
brw_simd_mark_compiled(simd_state, SIMD16, spilled);
|
||||
ASSERT_FALSE(brw_simd_should_compile(simd_state, SIMD32));
|
||||
|
||||
ASSERT_EQ(brw_simd_select(prog_data), SIMD8);
|
||||
ASSERT_EQ(brw_simd_select(simd_state), SIMD8);
|
||||
}
|
||||
|
||||
TEST_F(SIMDSelectionCS, EnvironmentVariable32)
|
||||
{
|
||||
intel_debug |= DEBUG_DO32;
|
||||
|
||||
ASSERT_TRUE(should_compile(SIMD8));
|
||||
brw_simd_mark_compiled(SIMD8, prog_data, not_spilled);
|
||||
ASSERT_TRUE(should_compile(SIMD16));
|
||||
brw_simd_mark_compiled(SIMD16, prog_data, not_spilled);
|
||||
ASSERT_TRUE(should_compile(SIMD32));
|
||||
brw_simd_mark_compiled(SIMD32, prog_data, not_spilled);
|
||||
ASSERT_TRUE(brw_simd_should_compile(simd_state, SIMD8));
|
||||
brw_simd_mark_compiled(simd_state, SIMD8, not_spilled);
|
||||
ASSERT_TRUE(brw_simd_should_compile(simd_state, SIMD16));
|
||||
brw_simd_mark_compiled(simd_state, SIMD16, not_spilled);
|
||||
ASSERT_TRUE(brw_simd_should_compile(simd_state, SIMD32));
|
||||
brw_simd_mark_compiled(simd_state, SIMD32, not_spilled);
|
||||
|
||||
ASSERT_EQ(brw_simd_select(prog_data), SIMD32);
|
||||
ASSERT_EQ(brw_simd_select(simd_state), SIMD32);
|
||||
}
|
||||
|
||||
TEST_F(SIMDSelectionCS, EnvironmentVariable32ButSpills)
|
||||
{
|
||||
intel_debug |= DEBUG_DO32;
|
||||
|
||||
ASSERT_TRUE(should_compile(SIMD8));
|
||||
brw_simd_mark_compiled(SIMD8, prog_data, not_spilled);
|
||||
ASSERT_TRUE(should_compile(SIMD16));
|
||||
brw_simd_mark_compiled(SIMD16, prog_data, not_spilled);
|
||||
ASSERT_TRUE(should_compile(SIMD32));
|
||||
brw_simd_mark_compiled(SIMD32, prog_data, spilled);
|
||||
ASSERT_TRUE(brw_simd_should_compile(simd_state, SIMD8));
|
||||
brw_simd_mark_compiled(simd_state, SIMD8, not_spilled);
|
||||
ASSERT_TRUE(brw_simd_should_compile(simd_state, SIMD16));
|
||||
brw_simd_mark_compiled(simd_state, SIMD16, not_spilled);
|
||||
ASSERT_TRUE(brw_simd_should_compile(simd_state, SIMD32));
|
||||
brw_simd_mark_compiled(simd_state, SIMD32, spilled);
|
||||
|
||||
ASSERT_EQ(brw_simd_select(prog_data), SIMD16);
|
||||
ASSERT_EQ(brw_simd_select(simd_state), SIMD16);
|
||||
}
|
||||
|
||||
TEST_F(SIMDSelectionCS, Require8)
|
||||
{
|
||||
required_dispatch_width = 8;
|
||||
simd_state.required_width = 8;
|
||||
|
||||
ASSERT_TRUE(should_compile(SIMD8));
|
||||
brw_simd_mark_compiled(SIMD8, prog_data, not_spilled);
|
||||
ASSERT_FALSE(should_compile(SIMD16));
|
||||
ASSERT_FALSE(should_compile(SIMD32));
|
||||
ASSERT_TRUE(brw_simd_should_compile(simd_state, SIMD8));
|
||||
brw_simd_mark_compiled(simd_state, SIMD8, not_spilled);
|
||||
ASSERT_FALSE(brw_simd_should_compile(simd_state, SIMD16));
|
||||
ASSERT_FALSE(brw_simd_should_compile(simd_state, SIMD32));
|
||||
|
||||
ASSERT_EQ(brw_simd_select(prog_data), SIMD8);
|
||||
ASSERT_EQ(brw_simd_select(simd_state), SIMD8);
|
||||
}
|
||||
|
||||
TEST_F(SIMDSelectionCS, Require8ErrorWhenNotCompile)
|
||||
{
|
||||
required_dispatch_width = 8;
|
||||
simd_state.required_width = 8;
|
||||
|
||||
ASSERT_TRUE(should_compile(SIMD8));
|
||||
ASSERT_FALSE(should_compile(SIMD16));
|
||||
ASSERT_FALSE(should_compile(SIMD32));
|
||||
ASSERT_TRUE(brw_simd_should_compile(simd_state, SIMD8));
|
||||
ASSERT_FALSE(brw_simd_should_compile(simd_state, SIMD16));
|
||||
ASSERT_FALSE(brw_simd_should_compile(simd_state, SIMD32));
|
||||
|
||||
ASSERT_EQ(brw_simd_select(prog_data), -1);
|
||||
ASSERT_EQ(brw_simd_select(simd_state), -1);
|
||||
}
|
||||
|
||||
TEST_F(SIMDSelectionCS, Require16)
|
||||
{
|
||||
required_dispatch_width = 16;
|
||||
simd_state.required_width = 16;
|
||||
|
||||
ASSERT_FALSE(should_compile(SIMD8));
|
||||
ASSERT_TRUE(should_compile(SIMD16));
|
||||
brw_simd_mark_compiled(SIMD16, prog_data, not_spilled);
|
||||
ASSERT_FALSE(should_compile(SIMD32));
|
||||
ASSERT_FALSE(brw_simd_should_compile(simd_state, SIMD8));
|
||||
ASSERT_TRUE(brw_simd_should_compile(simd_state, SIMD16));
|
||||
brw_simd_mark_compiled(simd_state, SIMD16, not_spilled);
|
||||
ASSERT_FALSE(brw_simd_should_compile(simd_state, SIMD32));
|
||||
|
||||
ASSERT_EQ(brw_simd_select(prog_data), SIMD16);
|
||||
ASSERT_EQ(brw_simd_select(simd_state), SIMD16);
|
||||
}
|
||||
|
||||
TEST_F(SIMDSelectionCS, Require16ErrorWhenNotCompile)
|
||||
{
|
||||
required_dispatch_width = 16;
|
||||
simd_state.required_width = 16;
|
||||
|
||||
ASSERT_FALSE(should_compile(SIMD8));
|
||||
ASSERT_TRUE(should_compile(SIMD16));
|
||||
ASSERT_FALSE(should_compile(SIMD32));
|
||||
ASSERT_FALSE(brw_simd_should_compile(simd_state, SIMD8));
|
||||
ASSERT_TRUE(brw_simd_should_compile(simd_state, SIMD16));
|
||||
ASSERT_FALSE(brw_simd_should_compile(simd_state, SIMD32));
|
||||
|
||||
ASSERT_EQ(brw_simd_select(prog_data), -1);
|
||||
ASSERT_EQ(brw_simd_select(simd_state), -1);
|
||||
}
|
||||
|
||||
TEST_F(SIMDSelectionCS, Require32)
|
||||
{
|
||||
required_dispatch_width = 32;
|
||||
simd_state.required_width = 32;
|
||||
|
||||
ASSERT_FALSE(should_compile(SIMD8));
|
||||
ASSERT_FALSE(should_compile(SIMD16));
|
||||
ASSERT_TRUE(should_compile(SIMD32));
|
||||
brw_simd_mark_compiled(SIMD32, prog_data, not_spilled);
|
||||
ASSERT_FALSE(brw_simd_should_compile(simd_state, SIMD8));
|
||||
ASSERT_FALSE(brw_simd_should_compile(simd_state, SIMD16));
|
||||
ASSERT_TRUE(brw_simd_should_compile(simd_state, SIMD32));
|
||||
brw_simd_mark_compiled(simd_state, SIMD32, not_spilled);
|
||||
|
||||
ASSERT_EQ(brw_simd_select(prog_data), SIMD32);
|
||||
ASSERT_EQ(brw_simd_select(simd_state), SIMD32);
|
||||
}
|
||||
|
||||
TEST_F(SIMDSelectionCS, Require32ErrorWhenNotCompile)
|
||||
{
|
||||
required_dispatch_width = 32;
|
||||
simd_state.required_width = 32;
|
||||
|
||||
ASSERT_FALSE(should_compile(SIMD8));
|
||||
ASSERT_FALSE(should_compile(SIMD16));
|
||||
ASSERT_TRUE(should_compile(SIMD32));
|
||||
ASSERT_FALSE(brw_simd_should_compile(simd_state, SIMD8));
|
||||
ASSERT_FALSE(brw_simd_should_compile(simd_state, SIMD16));
|
||||
ASSERT_TRUE(brw_simd_should_compile(simd_state, SIMD32));
|
||||
|
||||
ASSERT_EQ(brw_simd_select(prog_data), -1);
|
||||
ASSERT_EQ(brw_simd_select(simd_state), -1);
|
||||
}
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue