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mesa/src/intel/compiler/test_opt_cse.cpp

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intel/brw: Test corner case CSE of ADD3 instructions When the destination of both instructions is NULL and the conditional modifier matches, operands_match (by way of instructions_match) will only test the first two operands. This can result in bad CSE happening. This is a very, very narrow edge case. Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29848>
2024-06-25 14:07:32 -07:00
/*
* Copyright 2024 Intel Corporation
* SPDX-License-Identifier: MIT
*/
brw: Simplify the test code for brw passes The key change is to use a builder to write the expected shader result and compare that. To make this less error prone, a few helper functions were added - a way to allocate VGRFs from both shaders in parallel, that way the same brw_reg can be used in both of them; - assertions that a pass will make progress or not, and proper output when the unexpected happens; - use a common brw_shader_pass_test class so to collect some of the helpers; - make some helpers work directly with builder. The idea is to improve the signal in tests, so that the disasm comments are not necessary anymore. For example ``` TEST_F(saturate_propagation_test, basic) { brw_reg dst1 = bld.vgrf(BRW_TYPE_F); brw_reg src0 = bld.vgrf(BRW_TYPE_F); brw_reg src1 = bld.vgrf(BRW_TYPE_F); brw_reg dst0 = bld.ADD(src0, src1); set_saturate(true, bld.MOV(dst1, dst0)); /* = Before = * * 0: add(16) dst0 src0 src1 * 1: mov.sat(16) dst1 dst0 * * = After = * 0: add.sat(16) dst0 src0 src1 * 1: mov(16) dst1 dst0 */ brw_calculate_cfg(*v); bblock_t *block0 = v->cfg->blocks[0]; EXPECT_EQ(0, block0->start_ip); EXPECT_EQ(1, block0->end_ip); EXPECT_TRUE(saturate_propagation(v)); EXPECT_EQ(0, block0->start_ip); EXPECT_EQ(1, block0->end_ip); EXPECT_EQ(BRW_OPCODE_ADD, instruction(block0, 0)->opcode); EXPECT_TRUE(instruction(block0, 0)->saturate); EXPECT_EQ(BRW_OPCODE_MOV, instruction(block0, 1)->opcode); EXPECT_FALSE(instruction(block0, 1)->saturate); } ``` becomes ``` TEST_F(saturate_propagation_test, basic) { brw_builder bld = make_shader(MESA_SHADER_FRAGMENT, 16); brw_builder exp = make_shader(MESA_SHADER_FRAGMENT, 16); brw_reg dst0 = vgrf(bld, exp, BRW_TYPE_F); brw_reg dst1 = vgrf(bld, exp, BRW_TYPE_F); brw_reg src0 = vgrf(bld, exp, BRW_TYPE_F); brw_reg src1 = vgrf(bld, exp, BRW_TYPE_F); bld.ADD(dst0, src0, src1); bld.MOV(dst1, dst0)->saturate = true; EXPECT_PROGRESS(brw_opt_saturate_propagation, bld); exp.ADD(dst0, src0, src1)->saturate = true; exp.MOV(dst1, dst0); EXPECT_SHADERS_MATCH(bld, exp); } ``` Reviewed-by: Ian Romanick <ian.d.romanick@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33936>
2025-03-05 16:58:32 -08:00
#include "test_helpers.h"
intel/brw: Rename brw_fs_builder.h to brw_builder.h Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33076>
2025-01-15 08:20:46 -08:00
#include "brw_builder.h"
intel/brw: Test corner case CSE of ADD3 instructions When the destination of both instructions is NULL and the conditional modifier matches, operands_match (by way of instructions_match) will only test the first two operands. This can result in bad CSE happening. This is a very, very narrow edge case. Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29848>
2024-06-25 14:07:32 -07:00
brw: Simplify the test code for brw passes The key change is to use a builder to write the expected shader result and compare that. To make this less error prone, a few helper functions were added - a way to allocate VGRFs from both shaders in parallel, that way the same brw_reg can be used in both of them; - assertions that a pass will make progress or not, and proper output when the unexpected happens; - use a common brw_shader_pass_test class so to collect some of the helpers; - make some helpers work directly with builder. The idea is to improve the signal in tests, so that the disasm comments are not necessary anymore. For example ``` TEST_F(saturate_propagation_test, basic) { brw_reg dst1 = bld.vgrf(BRW_TYPE_F); brw_reg src0 = bld.vgrf(BRW_TYPE_F); brw_reg src1 = bld.vgrf(BRW_TYPE_F); brw_reg dst0 = bld.ADD(src0, src1); set_saturate(true, bld.MOV(dst1, dst0)); /* = Before = * * 0: add(16) dst0 src0 src1 * 1: mov.sat(16) dst1 dst0 * * = After = * 0: add.sat(16) dst0 src0 src1 * 1: mov(16) dst1 dst0 */ brw_calculate_cfg(*v); bblock_t *block0 = v->cfg->blocks[0]; EXPECT_EQ(0, block0->start_ip); EXPECT_EQ(1, block0->end_ip); EXPECT_TRUE(saturate_propagation(v)); EXPECT_EQ(0, block0->start_ip); EXPECT_EQ(1, block0->end_ip); EXPECT_EQ(BRW_OPCODE_ADD, instruction(block0, 0)->opcode); EXPECT_TRUE(instruction(block0, 0)->saturate); EXPECT_EQ(BRW_OPCODE_MOV, instruction(block0, 1)->opcode); EXPECT_FALSE(instruction(block0, 1)->saturate); } ``` becomes ``` TEST_F(saturate_propagation_test, basic) { brw_builder bld = make_shader(MESA_SHADER_FRAGMENT, 16); brw_builder exp = make_shader(MESA_SHADER_FRAGMENT, 16); brw_reg dst0 = vgrf(bld, exp, BRW_TYPE_F); brw_reg dst1 = vgrf(bld, exp, BRW_TYPE_F); brw_reg src0 = vgrf(bld, exp, BRW_TYPE_F); brw_reg src1 = vgrf(bld, exp, BRW_TYPE_F); bld.ADD(dst0, src0, src1); bld.MOV(dst1, dst0)->saturate = true; EXPECT_PROGRESS(brw_opt_saturate_propagation, bld); exp.ADD(dst0, src0, src1)->saturate = true; exp.MOV(dst1, dst0); EXPECT_SHADERS_MATCH(bld, exp); } ``` Reviewed-by: Ian Romanick <ian.d.romanick@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33936>
2025-03-05 16:58:32 -08:00
class cse_test : public brw_shader_pass_test {};
intel/brw: Test corner case CSE of ADD3 instructions When the destination of both instructions is NULL and the conditional modifier matches, operands_match (by way of instructions_match) will only test the first two operands. This can result in bad CSE happening. This is a very, very narrow edge case. Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29848>
2024-06-25 14:07:32 -07:00
brw: Simplify the test code for brw passes The key change is to use a builder to write the expected shader result and compare that. To make this less error prone, a few helper functions were added - a way to allocate VGRFs from both shaders in parallel, that way the same brw_reg can be used in both of them; - assertions that a pass will make progress or not, and proper output when the unexpected happens; - use a common brw_shader_pass_test class so to collect some of the helpers; - make some helpers work directly with builder. The idea is to improve the signal in tests, so that the disasm comments are not necessary anymore. For example ``` TEST_F(saturate_propagation_test, basic) { brw_reg dst1 = bld.vgrf(BRW_TYPE_F); brw_reg src0 = bld.vgrf(BRW_TYPE_F); brw_reg src1 = bld.vgrf(BRW_TYPE_F); brw_reg dst0 = bld.ADD(src0, src1); set_saturate(true, bld.MOV(dst1, dst0)); /* = Before = * * 0: add(16) dst0 src0 src1 * 1: mov.sat(16) dst1 dst0 * * = After = * 0: add.sat(16) dst0 src0 src1 * 1: mov(16) dst1 dst0 */ brw_calculate_cfg(*v); bblock_t *block0 = v->cfg->blocks[0]; EXPECT_EQ(0, block0->start_ip); EXPECT_EQ(1, block0->end_ip); EXPECT_TRUE(saturate_propagation(v)); EXPECT_EQ(0, block0->start_ip); EXPECT_EQ(1, block0->end_ip); EXPECT_EQ(BRW_OPCODE_ADD, instruction(block0, 0)->opcode); EXPECT_TRUE(instruction(block0, 0)->saturate); EXPECT_EQ(BRW_OPCODE_MOV, instruction(block0, 1)->opcode); EXPECT_FALSE(instruction(block0, 1)->saturate); } ``` becomes ``` TEST_F(saturate_propagation_test, basic) { brw_builder bld = make_shader(MESA_SHADER_FRAGMENT, 16); brw_builder exp = make_shader(MESA_SHADER_FRAGMENT, 16); brw_reg dst0 = vgrf(bld, exp, BRW_TYPE_F); brw_reg dst1 = vgrf(bld, exp, BRW_TYPE_F); brw_reg src0 = vgrf(bld, exp, BRW_TYPE_F); brw_reg src1 = vgrf(bld, exp, BRW_TYPE_F); bld.ADD(dst0, src0, src1); bld.MOV(dst1, dst0)->saturate = true; EXPECT_PROGRESS(brw_opt_saturate_propagation, bld); exp.ADD(dst0, src0, src1)->saturate = true; exp.MOV(dst1, dst0); EXPECT_SHADERS_MATCH(bld, exp); } ``` Reviewed-by: Ian Romanick <ian.d.romanick@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33936>
2025-03-05 16:58:32 -08:00
TEST_F(cse_test, add3_invalid)
intel/brw: Test corner case CSE of ADD3 instructions When the destination of both instructions is NULL and the conditional modifier matches, operands_match (by way of instructions_match) will only test the first two operands. This can result in bad CSE happening. This is a very, very narrow edge case. Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29848>
2024-06-25 14:07:32 -07:00
{
brw: Simplify the test code for brw passes The key change is to use a builder to write the expected shader result and compare that. To make this less error prone, a few helper functions were added - a way to allocate VGRFs from both shaders in parallel, that way the same brw_reg can be used in both of them; - assertions that a pass will make progress or not, and proper output when the unexpected happens; - use a common brw_shader_pass_test class so to collect some of the helpers; - make some helpers work directly with builder. The idea is to improve the signal in tests, so that the disasm comments are not necessary anymore. For example ``` TEST_F(saturate_propagation_test, basic) { brw_reg dst1 = bld.vgrf(BRW_TYPE_F); brw_reg src0 = bld.vgrf(BRW_TYPE_F); brw_reg src1 = bld.vgrf(BRW_TYPE_F); brw_reg dst0 = bld.ADD(src0, src1); set_saturate(true, bld.MOV(dst1, dst0)); /* = Before = * * 0: add(16) dst0 src0 src1 * 1: mov.sat(16) dst1 dst0 * * = After = * 0: add.sat(16) dst0 src0 src1 * 1: mov(16) dst1 dst0 */ brw_calculate_cfg(*v); bblock_t *block0 = v->cfg->blocks[0]; EXPECT_EQ(0, block0->start_ip); EXPECT_EQ(1, block0->end_ip); EXPECT_TRUE(saturate_propagation(v)); EXPECT_EQ(0, block0->start_ip); EXPECT_EQ(1, block0->end_ip); EXPECT_EQ(BRW_OPCODE_ADD, instruction(block0, 0)->opcode); EXPECT_TRUE(instruction(block0, 0)->saturate); EXPECT_EQ(BRW_OPCODE_MOV, instruction(block0, 1)->opcode); EXPECT_FALSE(instruction(block0, 1)->saturate); } ``` becomes ``` TEST_F(saturate_propagation_test, basic) { brw_builder bld = make_shader(MESA_SHADER_FRAGMENT, 16); brw_builder exp = make_shader(MESA_SHADER_FRAGMENT, 16); brw_reg dst0 = vgrf(bld, exp, BRW_TYPE_F); brw_reg dst1 = vgrf(bld, exp, BRW_TYPE_F); brw_reg src0 = vgrf(bld, exp, BRW_TYPE_F); brw_reg src1 = vgrf(bld, exp, BRW_TYPE_F); bld.ADD(dst0, src0, src1); bld.MOV(dst1, dst0)->saturate = true; EXPECT_PROGRESS(brw_opt_saturate_propagation, bld); exp.ADD(dst0, src0, src1)->saturate = true; exp.MOV(dst1, dst0); EXPECT_SHADERS_MATCH(bld, exp); } ``` Reviewed-by: Ian Romanick <ian.d.romanick@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33936>
2025-03-05 16:58:32 -08:00
set_gfx_verx10(125);
intel/brw: Test corner case CSE of ADD3 instructions When the destination of both instructions is NULL and the conditional modifier matches, operands_match (by way of instructions_match) will only test the first two operands. This can result in bad CSE happening. This is a very, very narrow edge case. Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29848>
2024-06-25 14:07:32 -07:00
brw: Simplify the test code for brw passes The key change is to use a builder to write the expected shader result and compare that. To make this less error prone, a few helper functions were added - a way to allocate VGRFs from both shaders in parallel, that way the same brw_reg can be used in both of them; - assertions that a pass will make progress or not, and proper output when the unexpected happens; - use a common brw_shader_pass_test class so to collect some of the helpers; - make some helpers work directly with builder. The idea is to improve the signal in tests, so that the disasm comments are not necessary anymore. For example ``` TEST_F(saturate_propagation_test, basic) { brw_reg dst1 = bld.vgrf(BRW_TYPE_F); brw_reg src0 = bld.vgrf(BRW_TYPE_F); brw_reg src1 = bld.vgrf(BRW_TYPE_F); brw_reg dst0 = bld.ADD(src0, src1); set_saturate(true, bld.MOV(dst1, dst0)); /* = Before = * * 0: add(16) dst0 src0 src1 * 1: mov.sat(16) dst1 dst0 * * = After = * 0: add.sat(16) dst0 src0 src1 * 1: mov(16) dst1 dst0 */ brw_calculate_cfg(*v); bblock_t *block0 = v->cfg->blocks[0]; EXPECT_EQ(0, block0->start_ip); EXPECT_EQ(1, block0->end_ip); EXPECT_TRUE(saturate_propagation(v)); EXPECT_EQ(0, block0->start_ip); EXPECT_EQ(1, block0->end_ip); EXPECT_EQ(BRW_OPCODE_ADD, instruction(block0, 0)->opcode); EXPECT_TRUE(instruction(block0, 0)->saturate); EXPECT_EQ(BRW_OPCODE_MOV, instruction(block0, 1)->opcode); EXPECT_FALSE(instruction(block0, 1)->saturate); } ``` becomes ``` TEST_F(saturate_propagation_test, basic) { brw_builder bld = make_shader(MESA_SHADER_FRAGMENT, 16); brw_builder exp = make_shader(MESA_SHADER_FRAGMENT, 16); brw_reg dst0 = vgrf(bld, exp, BRW_TYPE_F); brw_reg dst1 = vgrf(bld, exp, BRW_TYPE_F); brw_reg src0 = vgrf(bld, exp, BRW_TYPE_F); brw_reg src1 = vgrf(bld, exp, BRW_TYPE_F); bld.ADD(dst0, src0, src1); bld.MOV(dst1, dst0)->saturate = true; EXPECT_PROGRESS(brw_opt_saturate_propagation, bld); exp.ADD(dst0, src0, src1)->saturate = true; exp.MOV(dst1, dst0); EXPECT_SHADERS_MATCH(bld, exp); } ``` Reviewed-by: Ian Romanick <ian.d.romanick@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33936>
2025-03-05 16:58:32 -08:00
brw_builder bld = make_shader(MESA_SHADER_FRAGMENT, 16);
intel/brw: Test corner case CSE of ADD3 instructions When the destination of both instructions is NULL and the conditional modifier matches, operands_match (by way of instructions_match) will only test the first two operands. This can result in bad CSE happening. This is a very, very narrow edge case. Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29848>
2024-06-25 14:07:32 -07:00
intel/brw: Replace uses of fs_reg with brw_reg And remove the fs_reg alias. Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29791>
2024-06-18 23:42:59 -07:00
brw_reg dst0 = bld.null_reg_d();
brw_reg src0 = bld.vgrf(BRW_TYPE_D);
brw_reg src1 = bld.vgrf(BRW_TYPE_D);
brw_reg src2 = bld.vgrf(BRW_TYPE_D);
brw_reg src3 = bld.vgrf(BRW_TYPE_D);
intel/brw: Test corner case CSE of ADD3 instructions When the destination of both instructions is NULL and the conditional modifier matches, operands_match (by way of instructions_match) will only test the first two operands. This can result in bad CSE happening. This is a very, very narrow edge case. Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29848>
2024-06-25 14:07:32 -07:00
bld.ADD3(dst0, src0, src1, src2)
->conditional_mod = BRW_CONDITIONAL_NZ;
bld.ADD3(dst0, src0, src1, src3)
->conditional_mod = BRW_CONDITIONAL_NZ;
brw: Simplify the test code for brw passes The key change is to use a builder to write the expected shader result and compare that. To make this less error prone, a few helper functions were added - a way to allocate VGRFs from both shaders in parallel, that way the same brw_reg can be used in both of them; - assertions that a pass will make progress or not, and proper output when the unexpected happens; - use a common brw_shader_pass_test class so to collect some of the helpers; - make some helpers work directly with builder. The idea is to improve the signal in tests, so that the disasm comments are not necessary anymore. For example ``` TEST_F(saturate_propagation_test, basic) { brw_reg dst1 = bld.vgrf(BRW_TYPE_F); brw_reg src0 = bld.vgrf(BRW_TYPE_F); brw_reg src1 = bld.vgrf(BRW_TYPE_F); brw_reg dst0 = bld.ADD(src0, src1); set_saturate(true, bld.MOV(dst1, dst0)); /* = Before = * * 0: add(16) dst0 src0 src1 * 1: mov.sat(16) dst1 dst0 * * = After = * 0: add.sat(16) dst0 src0 src1 * 1: mov(16) dst1 dst0 */ brw_calculate_cfg(*v); bblock_t *block0 = v->cfg->blocks[0]; EXPECT_EQ(0, block0->start_ip); EXPECT_EQ(1, block0->end_ip); EXPECT_TRUE(saturate_propagation(v)); EXPECT_EQ(0, block0->start_ip); EXPECT_EQ(1, block0->end_ip); EXPECT_EQ(BRW_OPCODE_ADD, instruction(block0, 0)->opcode); EXPECT_TRUE(instruction(block0, 0)->saturate); EXPECT_EQ(BRW_OPCODE_MOV, instruction(block0, 1)->opcode); EXPECT_FALSE(instruction(block0, 1)->saturate); } ``` becomes ``` TEST_F(saturate_propagation_test, basic) { brw_builder bld = make_shader(MESA_SHADER_FRAGMENT, 16); brw_builder exp = make_shader(MESA_SHADER_FRAGMENT, 16); brw_reg dst0 = vgrf(bld, exp, BRW_TYPE_F); brw_reg dst1 = vgrf(bld, exp, BRW_TYPE_F); brw_reg src0 = vgrf(bld, exp, BRW_TYPE_F); brw_reg src1 = vgrf(bld, exp, BRW_TYPE_F); bld.ADD(dst0, src0, src1); bld.MOV(dst1, dst0)->saturate = true; EXPECT_PROGRESS(brw_opt_saturate_propagation, bld); exp.ADD(dst0, src0, src1)->saturate = true; exp.MOV(dst1, dst0); EXPECT_SHADERS_MATCH(bld, exp); } ``` Reviewed-by: Ian Romanick <ian.d.romanick@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33936>
2025-03-05 16:58:32 -08:00
EXPECT_NO_PROGRESS(brw_opt_cse_defs, bld);
intel/brw: Test corner case CSE of ADD3 instructions When the destination of both instructions is NULL and the conditional modifier matches, operands_match (by way of instructions_match) will only test the first two operands. This can result in bad CSE happening. This is a very, very narrow edge case. Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29848>
2024-06-25 14:07:32 -07:00
}
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