Hong Liu
f1b9bbe2b8
modeset init code cleanup
...
moving modeset init code into one function and correct error
handling druing i915 init
2008-05-12 12:07:04 -07:00
Hong Liu
af60d87869
fix G33 hardware status page in modeset
...
We need to alloc a hw status page bo for G33 if modeset is enabled since the 2D
driver can't alloc gfx memory when working in drm modeset.
2008-05-12 12:04:02 -07:00
Alex Deucher
10d754f0a2
RADEON: fix copy/pasto in last commit
2008-05-12 14:49:43 -04:00
Alex Deucher
75bc739bee
R3/4/5: init pipe setup in drm
...
Similar (broken) code in mesa needs to be removed
2008-05-12 09:44:20 -04:00
Alex Deucher
e16a7101e8
RADEON: cleanup radeon_do_engine_reset()
2008-05-12 09:35:06 -04:00
Alex Deucher
5532b8d2a0
R300+: fixup pixcache flush
2008-05-12 09:30:47 -04:00
Alex Deucher
3582e82f14
RS4xx: fix MCIND index mask
2008-05-12 09:24:13 -04:00
Alex Deucher
d26af273f8
RADEON: write AGP_BASE_2 on chips that support it
2008-05-12 09:21:45 -04:00
Alex Deucher
c307e50724
R300+: fixup PURGE/FLUSH macros
2008-05-12 09:18:28 -04:00
Alex Deucher
fb9eaff747
Radeon IGP: merge RS4xx/RS6xx gart setup
2008-05-12 09:13:44 -04:00
Alex Deucher
68b7f550ba
Radeon IGP: wrap MCIND access
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first step in merging rs4xx/rs6xx gart setup
2008-05-12 09:00:40 -04:00
Alex Deucher
a34025ce22
Radeon IGP: clean up registers and magic numbers
2008-05-12 08:56:11 -04:00
Dave Airlie
3f66a0005c
drm: remove root only from a lot of drm ioctls to get stuff running as non-root
2008-05-12 16:29:22 +10:00
Keith Packard
ff39db099b
[GEM] Make pread/pwrite manage memory domains. No luck with movnti though.
...
pread and pwrite must update the memory domains to ensure consistency with
the GPU. At some point, it should be possible to avoid clflush through this
path, but that isn't working for me.
2008-05-11 00:10:16 -07:00
Keith Packard
1f9eaceb71
Merge commit 'anholt/drm-gem' into drm-gem
2008-05-10 21:05:25 -07:00
Keith Packard
a37ac493da
[intel-GEM] Clean up GEM ioctl naming.
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Rename 'validate_entry' to 'exec_object', then clean up some field names in
structures (renaming buffer_offset to just offset, for example).
2008-05-10 21:04:18 -07:00
Eric Anholt
c5c59eab80
GEM: Separate the LRU into execution list and LRU list.
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Now, the LRU list has objects that are completely done rendering and ready
to kick out, while the execution list has things with active rendering,
which have associated cookies and reference counts on them.
2008-05-09 17:38:32 -07:00
Hong Liu
dce3442194
fixup i915 workqueue handling when modeset=1
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Fixup workqueue creation error handling and make sure we destroy the queue on
unload.
2008-05-09 14:29:10 -07:00
Jesse Barnes
12725a37af
i915: add basic VBT support
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Map the VBIOS (and therefore VBT) at init time for use by various output
initialization routines.
2008-05-09 14:19:00 -07:00
Keith Packard
1e26ca44c9
[gem] API cleanup. allocate->create unreference->close name->flink
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Make the API names a bit more consistent.
2008-05-09 12:18:09 -07:00
Jakob Bornecrantz
7bcbc443f4
i915: Changed intel_fb to use the new drm_crtc_set_config interface
2008-05-08 20:10:18 +02:00
Keith Packard
9af4c49743
[intel-gem] Move domains to relocation records. add set_domain ioctl.
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Domain information is about buffer relationships, not buffer contents. That
means a relocation contains the domain information as it knows how the
source buffer references the target buffer.
This also adds the set_domain ioctl so that user space can move buffers to
the cpu domain.
2008-05-08 10:44:02 -07:00
Dave Airlie
4466fea7ba
Revert "i915: fix vbl swap for multi-master"
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This reverts commit 2a78ad2264
2008-05-08 17:12:16 +10:00
Dave Airlie
2a78ad2264
i915: fix vbl swap for multi-master
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patch from F9 tree
2008-05-08 16:14:33 +10:00
Dave Airlie
ed072ed075
drm_mode: initial replacefb implemenation
2008-05-08 14:02:05 +10:00
Dave Airlie
ef204fb5c2
Merge remote branch 'origin/master' into modesetting-101
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Conflicts:
linux-core/Makefile.kernel
shared-core/i915_drv.h
2008-05-08 10:25:01 +10:00
Eric Anholt
5f5f01ed91
GEM: Extend cache domain stuff for 965.
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One of our MI_FLUSH bits is reserved on 965, being always implied, and there's
a vertex cache that was forgotten.
2008-05-07 12:46:06 -07:00
Keith Packard
6a6c37af9e
[intel-GEM] ref count objects in gtt-lru.
...
If objects on the lru aren't ref counted, they'll get pulled from the gtt as
soon as they are freed. This change does cause objects to get stuck in the
gtt until they're forced out by new requests. The lru should get cleaned
when the irq occurs.
2008-05-06 21:59:06 -07:00
Keith Packard
2b9ef32669
Merge commit 'anholt/drm-gem' into drm-gem
2008-05-06 14:43:56 -07:00
Keith Packard
631e86c5c4
Start coding up memory domains
2008-05-06 14:43:49 -07:00
Eric Anholt
d2373b2a34
GEM: Use irq-based fencing rather than syncing and evicting every exec.
2008-05-06 13:28:26 -07:00
Keith Packard
91cba3ae17
Dump last batch buffer when hardware lockup is detected.
2008-05-05 22:10:02 -07:00
Keith Packard
ed6657fa8e
Monitor ACTHD register while polling for idle ring.
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When batch buffers are executing, the ring may be stuck for a long time.
Monitor the ACTHD pointer which will show if the execution engine is
actually hung.
2008-05-05 22:09:34 -07:00
Keith Packard
d59a9300ec
Remove some debug messages.
2008-05-05 14:32:01 -07:00
Keith Packard
4511e6cd80
Correct execbuffer offset. Add memory barrier and chipset flush.
2008-05-05 11:27:06 -07:00
Keith Packard
b6f173c430
Add i915_dispatch_gem_execbuffer (broken).
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This function submits a gem-based execbuffer to the ring.
It doesn't work yet.
2008-05-05 10:51:49 -07:00
Dave Airlie
d015219bd0
r500: add allowed range for us config/pixsize
2008-05-05 17:03:27 +10:00
Keith Packard
39e20bcd5f
Add name/open ioctls, separate handle and pointer ref counts.
...
Names are just another unique integer set (from another idr object).
Names are removed when the user refernces (handles) are all destroyed --
this required that handles for objects be counted separately from
internal kernel references (so that we can tell when the handles are all
gone).
2008-05-02 12:29:17 -07:00
Keith Packard
49e8e3372a
Remove drm_driver argument to functions taking drm_gem_object.
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Now that drm_gem_object has a drm_driver * in it, functions don't need both
parameters.
2008-05-02 10:36:00 -07:00
Keith Packard
5b5b68ffd2
Fix nouveau warning when returning pointers in uint64_t objects.
2008-05-02 10:34:46 -07:00
Keith Packard
0d547c9ed9
Add alignment to all aperture allocation requests.
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When pinning buffers, or using execbuffer, allow the application to specify
the necessary aperture allocation alignment constraints.
2008-05-01 20:41:55 -07:00
Keith Packard
30efad5113
Fix gem ioctls to be 32/64-bit clean.
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mixed 32/64 bit systems need 'special' help for ioctl where the user-space
and kernel-space datatypes differ. Fixing the datatypes to be the same size,
and align the same way for both 32 and 64-bit ppc and x86 environments will
elimiante the need to have magic 32/64-bit ioctl translation code.
2008-05-01 20:31:16 -07:00
Eric Anholt
7d5f783eca
Make GEM object handles be nonzero.
2008-05-01 16:38:37 -07:00
Eric Anholt
d2529d1396
Remove _args from gem ioctl argument structure tags.
2008-05-01 16:27:03 -07:00
Eric Anholt
793549116e
Add pin/unpin object ioctls for gem.
2008-05-01 15:40:02 -07:00
Eric Anholt
ccd1bae0f6
checkpoint: relocations support.
2008-05-01 15:22:21 -07:00
Eric Anholt
5af87acbc2
checkpoint: gtt binding written.
2008-05-01 14:20:44 -07:00
Eric Anholt
2140e102f9
checkpoint: rename to GEM and a few more i915 bits.
2008-05-01 11:39:20 -07:00
Ben Skeggs
3ac74f3208
nv50: enable 0x400500 bit 0 after PGRAPH exception also
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No solid idea about what these 2 bits do, but nv50 can now survive a few
PGRAPH exceptions just as nv40 does :)
2008-05-02 01:36:30 +10:00
Ben Skeggs
6d8062ac1e
nouveau: guard against channels potentially not having a context, fix nv50
2008-05-02 01:36:08 +10:00
