mirror of
https://gitlab.freedesktop.org/mesa/drm.git
synced 2026-05-08 15:08:05 +02:00
modeset init code cleanup
moving modeset init code into one function and correct error handling druing i915 init
This commit is contained in:
Hong Liu
Jesse Barnes
parent
af60d87869
commit
f1b9bbe2b8
1 changed files with 200 additions and 137 deletions
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@ -99,6 +99,181 @@ int i915_probe_agp(struct pci_dev *pdev, unsigned long *aperture_size,
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return 0;
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}
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int i915_load_modeset_init(struct drm_device *dev)
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{
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struct drm_i915_private *dev_priv = dev->dev_private;
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unsigned long agp_size, prealloc_size;
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int size, ret = 0;
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i915_probe_agp(dev->pdev, &agp_size, &prealloc_size);
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printk("setting up %ld bytes of VRAM space\n", prealloc_size);
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printk("setting up %ld bytes of TT space\n", (agp_size - prealloc_size));
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drm_bo_init_mm(dev, DRM_BO_MEM_VRAM, 0, prealloc_size >> PAGE_SHIFT, 1);
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drm_bo_init_mm(dev, DRM_BO_MEM_TT, prealloc_size >> PAGE_SHIFT,
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(agp_size - prealloc_size) >> PAGE_SHIFT, 1);
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I915_WRITE(LP_RING + RING_LEN, 0);
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I915_WRITE(LP_RING + RING_HEAD, 0);
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I915_WRITE(LP_RING + RING_TAIL, 0);
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size = PRIMARY_RINGBUFFER_SIZE;
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ret = drm_buffer_object_create(dev, size, drm_bo_type_kernel,
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DRM_BO_FLAG_READ | DRM_BO_FLAG_WRITE |
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DRM_BO_FLAG_MEM_VRAM |
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DRM_BO_FLAG_NO_EVICT,
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DRM_BO_HINT_DONT_FENCE, 0x1, 0,
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&dev_priv->ring_buffer);
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if (ret < 0) {
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DRM_ERROR("Unable to allocate or pin ring buffer\n");
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goto clean_mm;
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}
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/* remap the buffer object properly */
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dev_priv->ring.Start = dev_priv->ring_buffer->offset;
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dev_priv->ring.End = dev_priv->ring.Start + size;
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dev_priv->ring.Size = size;
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dev_priv->ring.tail_mask = dev_priv->ring.Size - 1;
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/* FIXME: need wrapper with PCI mem checks */
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ret = drm_mem_reg_ioremap(dev, &dev_priv->ring_buffer->mem,
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(void **) &dev_priv->ring.virtual_start);
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if (ret) {
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DRM_ERROR("error mapping ring buffer: %d\n", ret);
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goto destroy_ringbuffer;
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}
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DRM_DEBUG("ring start %08lX, %p, %08lX\n", dev_priv->ring.Start,
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dev_priv->ring.virtual_start, dev_priv->ring.Size);
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memset((void *)(dev_priv->ring.virtual_start), 0, dev_priv->ring.Size);
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I915_WRITE(LP_RING + RING_START, dev_priv->ring.Start);
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I915_WRITE(LP_RING + RING_LEN,
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((dev_priv->ring.Size - 4096) & RING_NR_PAGES) |
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(RING_NO_REPORT | RING_VALID));
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/* We are using separate values as placeholders for mechanisms for
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* private backbuffer/depthbuffer usage.
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*/
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dev_priv->use_mi_batchbuffer_start = 0;
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/* Allow hardware batchbuffers unless told otherwise.
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*/
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dev_priv->allow_batchbuffer = 1;
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/* Program Hardware Status Page */
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if (!IS_G33(dev)) {
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dev_priv->status_page_dmah =
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drm_pci_alloc(dev, PAGE_SIZE, PAGE_SIZE, 0xffffffff);
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if (!dev_priv->status_page_dmah) {
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DRM_ERROR("Can not allocate hardware status page\n");
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ret = -ENOMEM;
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goto destroy_ringbuffer;
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}
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dev_priv->hw_status_page = dev_priv->status_page_dmah->vaddr;
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dev_priv->dma_status_page = dev_priv->status_page_dmah->busaddr;
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memset(dev_priv->hw_status_page, 0, PAGE_SIZE);
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I915_WRITE(I915REG_HWS_PGA, dev_priv->dma_status_page);
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} else {
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size = 4 * 1024;
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ret = drm_buffer_object_create(dev, size,
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drm_bo_type_kernel,
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DRM_BO_FLAG_READ | DRM_BO_FLAG_WRITE |
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DRM_BO_FLAG_MEM_VRAM |
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DRM_BO_FLAG_NO_EVICT,
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DRM_BO_HINT_DONT_FENCE, 0x1, 0,
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&dev_priv->hws_bo);
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if (ret < 0) {
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DRM_ERROR("Unable to allocate or pin hw status page\n");
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ret = -EINVAL;
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goto destroy_ringbuffer;
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}
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dev_priv->status_gfx_addr =
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dev_priv->hws_bo->offset & (0x1ffff << 12);
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dev_priv->hws_map.offset = dev->agp->base +
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dev_priv->hws_bo->offset;
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dev_priv->hws_map.size = size;
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dev_priv->hws_map.type= 0;
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dev_priv->hws_map.flags= 0;
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dev_priv->hws_map.mtrr = 0;
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drm_core_ioremap(&dev_priv->hws_map, dev);
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if (dev_priv->hws_map.handle == NULL) {
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dev_priv->status_gfx_addr = 0;
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DRM_ERROR("can not ioremap virtual addr for"
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"G33 hw status page\n");
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ret = -ENOMEM;
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goto destroy_hws;
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}
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dev_priv->hw_status_page = dev_priv->hws_map.handle;
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memset(dev_priv->hw_status_page, 0, PAGE_SIZE);
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I915_WRITE(I915REG_HWS_PGA, dev_priv->status_gfx_addr);
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}
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DRM_DEBUG("Enabled hardware status page\n");
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dev_priv->wq = create_singlethread_workqueue("i915");
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if (dev_priv->wq == 0) {
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DRM_DEBUG("Error\n");
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ret = -EINVAL;
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goto destroy_hws;
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}
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ret = intel_find_bios(dev);
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if (ret) {
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DRM_ERROR("failed to find VBT\n");
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ret = -ENODEV;
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goto destroy_wq;
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}
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intel_modeset_init(dev);
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drm_initial_config(dev, false);
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drm_mm_print(&dev->bm.man[DRM_BO_MEM_VRAM].manager, "VRAM");
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drm_mm_print(&dev->bm.man[DRM_BO_MEM_TT].manager, "TT");
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dev->devname = kstrdup(DRIVER_NAME, GFP_KERNEL);
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if (!dev->devname) {
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ret = -ENOMEM;
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goto modeset_cleanup;
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}
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ret = drm_irq_install(dev);
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if (ret) {
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kfree(dev->devname);
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goto modeset_cleanup;
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}
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return 0;
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modeset_cleanup:
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intel_modeset_cleanup(dev);
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destroy_wq:
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destroy_workqueue(dev_priv->wq);
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destroy_hws:
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if (!IS_G33(dev)) {
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if (dev_priv->status_page_dmah)
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drm_pci_free(dev, dev_priv->status_page_dmah);
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} else {
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if (dev_priv->hws_map.handle)
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drm_core_ioremapfree(&dev_priv->hws_map, dev);
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if (dev_priv->hws_bo)
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drm_bo_usage_deref_unlocked(&dev_priv->hws_bo);
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}
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I915_WRITE(I915REG_HWS_PGA, 0x1ffff000);
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destroy_ringbuffer:
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if (dev_priv->ring.virtual_start)
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drm_mem_reg_iounmap(dev, &dev_priv->ring_buffer->mem,
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dev_priv->ring.virtual_start);
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if (dev_priv->ring_buffer)
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drm_bo_usage_deref_unlocked(&dev_priv->ring_buffer);
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clean_mm:
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drm_bo_clean_mm(dev, DRM_BO_MEM_VRAM, 1);
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drm_bo_clean_mm(dev, DRM_BO_MEM_TT, 1);
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return ret;
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}
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/**
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* i915_driver_load - setup chip and create an initial config
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* @dev: DRM device
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@ -113,8 +288,7 @@ int i915_probe_agp(struct pci_dev *pdev, unsigned long *aperture_size,
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int i915_driver_load(struct drm_device *dev, unsigned long flags)
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{
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struct drm_i915_private *dev_priv;
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unsigned long agp_size, prealloc_size;
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int size, ret;
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int ret = 0;
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dev_priv = drm_alloc(sizeof(struct drm_i915_private), DRM_MEM_DRIVER);
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if (dev_priv == NULL)
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@ -156,16 +330,18 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)
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drm_get_resource_start(dev, 0) & 0xff000000;
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} else {
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DRM_ERROR("Unable to find MMIO registers\n");
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return -ENODEV;
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ret = -ENODEV;
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goto free_priv;
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}
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DRM_DEBUG("fb_base: 0x%08lx\n", dev->mode_config.fb_base);
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ret = drm_addmap(dev, dev_priv->mmiobase, dev_priv->mmiolen,
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_DRM_REGISTERS, _DRM_KERNEL|_DRM_READ_ONLY|_DRM_DRIVER, &dev_priv->mmio_map);
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_DRM_REGISTERS, _DRM_KERNEL|_DRM_READ_ONLY|_DRM_DRIVER,
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&dev_priv->mmio_map);
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if (ret != 0) {
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DRM_ERROR("Cannot add mapping for MMIO registers\n");
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return ret;
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goto free_priv;
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}
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#ifdef __linux__
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@ -177,141 +353,28 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)
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/*
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* Initialize the memory manager for local and AGP space
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*/
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drm_bo_driver_init(dev);
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if (drm_core_check_feature(dev, DRIVER_MODESET)) {
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i915_probe_agp(dev->pdev, &agp_size, &prealloc_size);
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printk("setting up %ld bytes of VRAM space\n", prealloc_size);
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printk("setting up %ld bytes of TT space\n", (agp_size - prealloc_size));
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drm_bo_init_mm(dev, DRM_BO_MEM_VRAM, 0, prealloc_size >> PAGE_SHIFT, 1);
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drm_bo_init_mm(dev, DRM_BO_MEM_TT, prealloc_size >> PAGE_SHIFT, (agp_size - prealloc_size) >> PAGE_SHIFT, 1);
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I915_WRITE(LP_RING + RING_LEN, 0);
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I915_WRITE(LP_RING + RING_HEAD, 0);
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I915_WRITE(LP_RING + RING_TAIL, 0);
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size = PRIMARY_RINGBUFFER_SIZE;
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ret = drm_buffer_object_create(dev, size, drm_bo_type_kernel,
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DRM_BO_FLAG_READ | DRM_BO_FLAG_WRITE |
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DRM_BO_FLAG_MEM_VRAM |
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DRM_BO_FLAG_NO_EVICT,
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DRM_BO_HINT_DONT_FENCE, 0x1, 0,
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&dev_priv->ring_buffer);
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if (ret < 0) {
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DRM_ERROR("Unable to allocate or pin ring buffer\n");
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return -EINVAL;
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}
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/* remap the buffer object properly */
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dev_priv->ring.Start = dev_priv->ring_buffer->offset;
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dev_priv->ring.End = dev_priv->ring.Start + size;
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dev_priv->ring.Size = size;
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dev_priv->ring.tail_mask = dev_priv->ring.Size - 1;
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/* FIXME: need wrapper with PCI mem checks */
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ret = drm_mem_reg_ioremap(dev, &dev_priv->ring_buffer->mem,
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(void **) &dev_priv->ring.virtual_start);
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if (ret)
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DRM_ERROR("error mapping ring buffer: %d\n", ret);
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DRM_DEBUG("ring start %08lX, %p, %08lX\n", dev_priv->ring.Start,
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dev_priv->ring.virtual_start, dev_priv->ring.Size);
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//
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memset((void *)(dev_priv->ring.virtual_start), 0, dev_priv->ring.Size);
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I915_WRITE(LP_RING + RING_START, dev_priv->ring.Start);
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I915_WRITE(LP_RING + RING_LEN,
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((dev_priv->ring.Size - 4096) & RING_NR_PAGES) |
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(RING_NO_REPORT | RING_VALID));
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/* We are using separate values as placeholders for mechanisms for
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* private backbuffer/depthbuffer usage.
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*/
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dev_priv->use_mi_batchbuffer_start = 0;
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/* Allow hardware batchbuffers unless told otherwise.
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*/
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dev_priv->allow_batchbuffer = 1;
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/* Program Hardware Status Page */
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if (!IS_G33(dev)) {
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dev_priv->status_page_dmah =
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drm_pci_alloc(dev, PAGE_SIZE, PAGE_SIZE, 0xffffffff);
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if (!dev_priv->status_page_dmah) {
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dev->dev_private = (void *)dev_priv;
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i915_dma_cleanup(dev);
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DRM_ERROR("Can not allocate hardware status page\n");
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return -ENOMEM;
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}
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dev_priv->hw_status_page = dev_priv->status_page_dmah->vaddr;
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dev_priv->dma_status_page = dev_priv->status_page_dmah->busaddr;
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memset(dev_priv->hw_status_page, 0, PAGE_SIZE);
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I915_WRITE(I915REG_HWS_PGA, dev_priv->dma_status_page);
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} else {
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size = 4 * 1024;
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ret = drm_buffer_object_create(dev, size,
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drm_bo_type_kernel,
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DRM_BO_FLAG_READ | DRM_BO_FLAG_WRITE |
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DRM_BO_FLAG_MEM_VRAM |
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DRM_BO_FLAG_NO_EVICT,
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DRM_BO_HINT_DONT_FENCE, 0x1, 0,
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&dev_priv->hws_bo);
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if (ret < 0) {
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DRM_ERROR("Unable to allocate or pin ring buffer\n");
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return -EINVAL;
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}
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dev_priv->status_gfx_addr =
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dev_priv->hws_bo->offset & (0x1ffff << 12);
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dev_priv->hws_map.offset = dev->agp->base +
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dev_priv->hws_bo->offset;
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dev_priv->hws_map.size = size;
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dev_priv->hws_map.type = 0;
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dev_priv->hws_map.flags = 0;
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dev_priv->hws_map.mtrr = 0;
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drm_core_ioremap(&dev_priv->hws_map, dev);
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if (dev_priv->hws_map.handle == NULL) {
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dev_priv->status_gfx_addr = 0;
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DRM_ERROR("can not ioremap virtual addr"
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" for G33 hw status page\n");
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return -ENOMEM;
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}
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dev_priv->hw_status_page = dev_priv->hws_map.handle;
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memset(dev_priv->hw_status_page, 0, size);
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I915_WRITE(I915REG_HWS_PGA, dev_priv->status_gfx_addr);
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}
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DRM_DEBUG("Enabled hardware status page\n");
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dev_priv->wq = create_singlethread_workqueue("i915");
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if (dev_priv->wq == 0) {
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DRM_DEBUG("Error\n");
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}
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ret = intel_find_bios(dev);
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if (ret) {
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DRM_ERROR("failed to find VBT\n");
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return -ENODEV;
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}
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intel_modeset_init(dev);
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drm_initial_config(dev, false);
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drm_mm_print(&dev->bm.man[DRM_BO_MEM_VRAM].manager, "VRAM");
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drm_mm_print(&dev->bm.man[DRM_BO_MEM_TT].manager, "TT");
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dev->devname = kstrdup(DRIVER_NAME, GFP_KERNEL);
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if (!dev->devname)
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return -ENOMEM;
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drm_irq_install(dev);
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ret = drm_bo_driver_init(dev);
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if (ret) {
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DRM_ERROR("fail to init memory manager for local & AGP space\n");
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goto out_rmmap;
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}
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if (drm_core_check_feature(dev, DRIVER_MODESET)) {
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ret = i915_load_modeset_init(dev);
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if (ret < 0) {
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DRM_ERROR("failed to init modeset\n");
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goto driver_fini;
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}
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}
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return 0;
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driver_fini:
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drm_bo_driver_finish(dev);
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out_rmmap:
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drm_rmmap(dev, dev_priv->mmio_map);
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free_priv:
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drm_free(dev_priv, sizeof(struct drm_i915_private), DRM_MEM_DRIVER);
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return ret;
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}
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int i915_driver_unload(struct drm_device *dev)
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