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https://gitlab.freedesktop.org/mesa/mesa.git
synced 2026-05-20 22:08:10 +02:00
Some new CTS tests have geometry shader looking like this :
void main()
{
gl_Position = gl_in[0].gl_Position;
EmitVertex();
EndPrimitive();
// <-- some storage buffer write
}
The generate shader has :
- a message to write the position
- a message to write to the storage buffer
- a final message to end the thread
This generates an empty EOT URB messages which is apparently not legal
(simulation complains, HW hangs) :
send(8) nullUD g126UD nullUD 0x04088007 0x00000000
urb MsgDesc: offset 0 SIMD8 write masked mlen 2 ex_mlen 0 rlen 0 { align1 1Q A@1 EOT };
Instead emit a write with actual data and the mask set at 0 to discard
the effect :
mov(8) g127<1>UD 0x00000000UD { align1 WE_all 1Q };
mov(8) g125<1>UD 0x00000000UD { align1 1Q };
send(8) nullUD g126UD g125UD 0x04088007 0x00000040
urb MsgDesc: offset 0 SIMD8 write masked mlen 2 ex_mlen 1 rlen 0 { align1 1Q A@1 EOT };
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38243>
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|---|---|---|
| .. | ||
| brw | ||
| elk | ||
| brw_device_sha1_gen_c.py | ||
| brw_list.h | ||
| intel_gfx_ver_enum.h | ||
| intel_nir.c | ||
| intel_nir.h | ||
| intel_nir_blockify_uniform_loads.c | ||
| intel_nir_clamp_image_1d_2d_array_sizes.c | ||
| intel_nir_clamp_per_vertex_loads.c | ||
| intel_nir_lower_non_uniform_barycentric_at_sample.c | ||
| intel_nir_lower_non_uniform_resource_intel.c | ||
| intel_nir_lower_printf.c | ||
| intel_nir_lower_shading_rate_output.c | ||
| intel_nir_lower_sparse.c | ||
| intel_nir_opt_peephole_ffma.c | ||
| intel_nir_opt_peephole_imul32x16.c | ||
| intel_nir_tcs_workarounds.c | ||
| intel_prim.h | ||
| intel_shader_enums.h | ||
| meson.build | ||