Rhys Perry f6581b41c4 aco/ra: don't require alignment for NPOT SGPR temporaries ... Aligning these can create situations where register allocation is impossible. Only pseudo-instructions can use these, and they don't require any alignment. I'm not sure if these temporaries actually happen in practice. This probably only affects the get_reg()'s compact_relocate_vars fallback path, which doesn't usually happen for SGPRs. Signed-off-by: Rhys Perry <pendingchaos02@gmail.com> Reviewed-by: Daniel Schürmann <daniel@schuermann.dev> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34343>		2025-04-29 15:15:10 +00:00
..
addrlib	amd/addrlib: remove the DCC page fault workaround	2025-04-01 03:23:22 -04:00
ci	amd/ci: document regression in e612e840...e210b79c	2025-04-29 11:09:35 +02:00
common	ac/nir: init blake3 for cs blit shader	2025-04-23 07:59:10 +00:00
compiler	aco/ra: don't require alignment for NPOT SGPR temporaries	2025-04-29 15:15:10 +00:00
drm-shim	amd/drm-shim: add gfx1201	2025-03-10 11:21:36 +00:00
gmlib	amd/gmlib: add gmlib for radeonsi	2025-02-27 03:15:16 +00:00
llvm	ac/llvm: use mul24 intrinsics	2025-04-23 01:11:48 +00:00
registers	amd: Rename GFX1103_R1/R2 to PHOENIX/2	2024-11-20 02:14:40 +00:00
vpelib	amd/vpelib: More parameters to the segmentation process and introduce validation hook	2025-03-06 02:11:53 +00:00
vulkan	radv: Ignore image barrier queue families if equal	2025-04-29 08:15:28 +00:00
meson.build	amd/gmlib: add gmlib for radeonsi	2025-02-27 03:15:16 +00:00