Paulo Zanoni bac3b56d51 brw: extend the NOP+WHILE workaround ... It turns out that we need to add a NOP not only in between two consecutive WHILE instructions, but also after every control flow instruction that immediately precedes a WHILE. v2: Rebase after the renames. Fixes: 5ca883505e ("brw: add a NOP in between WHILE instructions on LNL") Reviewed-by: Francisco Jerez <currojerez@riseup.net> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33021> (cherry picked from commit fd10764cff)		2025-02-28 22:17:35 +01:00
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blorp	intel: Add meson option -Dintel-elk	2025-01-30 00:45:59 +00:00
ci	iris: fix handling of GL_*_VERTEX_CONVENTION	2025-02-28 22:17:35 +01:00
common	intel/common/xe2+: Allow SIMD32 PS for all multisample cases.	2025-01-29 23:39:32 +00:00
compiler	brw: extend the NOP+WHILE workaround	2025-02-28 22:17:35 +01:00
decoder	intel: Add meson option -Dintel-elk	2025-01-30 00:45:59 +00:00
dev	intel/brw: Use SHADER_OPCODE_SEND_GATHER in Xe3	2025-01-30 04:43:58 +00:00
ds	intel : Expose Shader hashes for utrace and Perfetto	2025-01-10 17:38:16 +00:00
executor	intel/executor: Fix typo when copying result into Lua table	2025-01-29 09:57:23 +00:00
genxml	anv/xe3+: Set RegistersPerThread for bindless shader dispatch.	2025-01-29 23:39:32 +00:00
isl	isl: use workaround framework for Wa_1207137018	2025-01-29 12:10:13 +00:00
nullhw-layer	build: pass licensing information in SPDX form	2024-06-29 12:42:49 -07:00
perf	intel/perf: add new perf consts to support more metrics	2025-01-16 00:01:56 +00:00
shaders	clc,libagx: automatically set lang version	2025-01-28 23:01:32 +00:00
tools	intel: Add meson option -Dintel-elk	2025-01-30 00:45:59 +00:00
vulkan	anv: fix missing 3DSTATE_PS:Kernel0MaximumPolysperThread programming	2025-02-28 22:17:35 +01:00
vulkan_hasvk	hasvk: disable logic op for float/srgb formats	2025-01-29 08:02:21 +00:00
meson.build	intel: Add meson option -Dintel-elk	2025-01-30 00:45:59 +00:00