fdo-mirrors/mesa
1
0
Fork 0
mirror of https://gitlab.freedesktop.org/mesa/mesa.git synced 2025-12-24 19:40:10 +01:00
Code Issues Projects Releases Packages Wiki Activity Actions 1

brw: extend the NOP+WHILE workaround

Browse source 
It turns out that we need to add a NOP not only in between two
consecutive WHILE instructions, but also after every control flow
instruction that immediately precedes a WHILE.

v2: Rebase after the renames.

Fixes: 5ca883505e ("brw: add a NOP in between WHILE instructions on LNL")
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33021>
This commit is contained in:
Paulo Zanoni 2025-01-08 17:38:25 -08:00 • committed by Marge Bot
parent 3596b4e325
commit fd10764cff
1 changed files with 7 additions and 6 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

13
src/intel/compiler/brw_generator.cpp
View file

@ -772,7 +772,7 @@ brw_generator::generate_code(const cfg_t *cfg, int dispatch_width,
struct disasm_info *disasm_info = disasm_initialize(p->isa, cfg);
enum opcode prev_opcode = BRW_OPCODE_ILLEGAL;
brw_inst *prev_inst = NULL;
foreach_block_and_inst (block, brw_inst, inst, cfg) {
if (inst->opcode == SHADER_OPCODE_UNDEF)
continue;
@ -1095,11 +1095,12 @@ brw_generator::generate_code(const cfg_t *cfg, int dispatch_width,
break;
case BRW_OPCODE_WHILE:
/* On LNL and newer, if we don't put a NOP in between two consecutive
* WHILE instructions we may end up with misrendering or GPU hangs.
* See HSD 22020521218.
/* Workaround for an issue with branch prediction for WHILE
* instructions that may lead to misrendering or GPU hangs.
* See HSDs 22020521218 and 16026360541.
*/
if (devinfo->ver >= 20 && unlikely(prev_opcode == BRW_OPCODE_WHILE))
if (devinfo->ver >= 20 && prev_inst &&
unlikely(prev_inst->is_control_flow()))
brw_NOP(p);
brw_WHILE(p);
@ -1363,7 +1364,7 @@ brw_generator::generate_code(const cfg_t *cfg, int dispatch_width,
case SHADER_OPCODE_LOAD_PAYLOAD:
unreachable("Should be lowered by lower_load_payload()");
}
prev_opcode = inst->opcode;
prev_inst = inst;
if (multiple_instructions_emitted)
continue;