Christian Gmeiner a11501e014 etnaviv: linker: handle scenario where there are FS inputs without matching VS output ... If there is a FS input but no VS output the behavior is undefined but okay. Use a register 0 (position) for such cases. glsl-routing test triggers it with e.g. the following subtest. Test: VS(C0 -- T0 -- T2 -- T4 T5) FS(C0 C1 T0 T1 T2 T3 T4 T5) This will now end with following linker debug output: link result: vs -> fs comps use pa_attr t1 -> t1 xyzw 0,0,0,0 0x000002f1 t2 -> t2 xyzw 0,0,0,0 0x000002f1 t0 -> t3 xyzw 0,0,0,0 0x000002f1 t3 -> t4 xyzw 0,0,0,0 0x000002f1 t0 -> t5 xyzw 0,0,0,0 0x000002f1 t4 -> t6 xyzw 0,0,0,0 0x000002f1 t5 -> t7 xyzw 0,0,0,0 0x000002f1 Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24030>		2023-07-11 11:15:31 +00:00
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ci	etnaviv: linker: handle scenario where there are FS inputs without matching VS output	2023-07-11 11:15:31 +00:00
drm	etnaviv: drm: fix check if BO is on a deferred destroy list	2023-01-28 13:48:30 +00:00
drm-shim	meson: add idep_mesautil to components using simple_mtx.h	2020-11-24 18:13:07 -08:00
meson.build	etnaviv: add drm-shim	2019-11-21 22:56:04 +00:00