mesa/src/amd
David Rosca e4ec135d8b radv/video: Fix HEVC slice control
This needs to use aligned size, otherwise it will output two
slices when the size is not 64 aligned.

Fixes: 967e4e09de ("radv/video: add h265 encode support")
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31418>
2024-11-14 07:52:56 +00:00
..
addrlib ac: make sure VEGA20 and MI200 version ranges don't overlap with other chips 2024-09-27 19:21:55 +00:00
ci radv/ci: document flakes seen recently 2024-11-13 12:26:49 +00:00
common radv,ac/nir: split global access using nir_lower_mem_access_bit_sizes 2024-11-13 12:59:26 +00:00
compiler radv,aco: dump VGPRS from the trap handler shader 2024-11-13 15:27:54 +00:00
drm-shim amd/drm-shim: add GFX1150 support 2024-08-13 13:17:17 +00:00
llvm nir,aco,ac/llvm: add nir_op_alignbyte_amd 2024-11-13 12:59:26 +00:00
registers amd: add gfx12 register definitions 2024-05-11 22:14:05 -04:00
vpelib amd/vpelib: remove luma offset (#459) 2024-11-11 13:00:54 +08:00
vulkan radv/video: Fix HEVC slice control 2024-11-14 07:52:56 +00:00
meson.build build: pass licensing information in SPDX form 2024-06-29 12:42:49 -07:00