mesa/src/intel
Alyssa Rosenzweig e3328dfa2f brw: only initialize sample mask flag if needed
This is a refinement of 7c129d9365 ("intel/brw/xe2+: Keep PS sample mask in the
f1.0 register whether or not kill is used."). Rather than always insert this
move, do so only when we'll actually read the register: for memory writes and
for discards. This deletes an instruction from piles of fragment shaders.

shader-db on LNL:

total instructions in shared programs: 17134031 -> 17042706 (-0.53%)
instructions in affected programs: 9065743 -> 8974418 (-1.01%)
helped: 65045
HURT: 0
helped stats (abs) min: 1.0 max: 3.0 x̄: 1.40 x̃: 1
helped stats (rel) min: <.01% max: 50.00% x̄: 3.06% x̃: 1.64%
95% mean confidence interval for instructions value: -1.41 -1.40
95% mean confidence interval for instructions %-change: -3.10% -3.03%
Instructions are helped.

total cycles in shared programs: 885172098 -> 884835306 (-0.04%)
cycles in affected programs: 590294230 -> 589957438 (-0.06%)
helped: 53636
HURT: 4500
helped stats (abs) min: 2.0 max: 1126.0 x̄: 8.02 x̃: 4
helped stats (rel) min: <.01% max: 50.00% x̄: 1.24% x̃: 0.24%
HURT stats (abs)   min: 2.0 max: 7706.0 x̄: 20.77 x̃: 6
HURT stats (rel)   min: <.01% max: 82.06% x̄: 1.09% x̃: 0.54%
95% mean confidence interval for cycles value: -6.15 -5.43
95% mean confidence interval for cycles %-change: -1.10% -1.02%
Cycles are helped.

LOST:   385
GAINED: 47

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38665>
2025-11-26 16:53:36 +00:00
..
blorp treewide: Replace calling to function ALIGN with align 2025-11-12 21:58:40 +00:00
ci anv/ci: Run vkd3d job in parallel 2025-11-18 07:41:42 +00:00
common treewide: Replace calling to function ALIGN with align 2025-11-12 21:58:40 +00:00
compiler brw: only initialize sample mask flag if needed 2025-11-26 16:53:36 +00:00
decoder intel/decoder: make libvulkan_intel to depend on stub decoder when buildtyle=release. 2025-11-24 16:40:02 +08:00
dev intel/isl: add INTEL_DEBUG=noccs-modifier to disable CCS modifiers 2025-11-13 09:52:27 +00:00
ds anv: track descriptor mode in SBA tracepoint 2025-11-17 15:06:55 +00:00
executor meson: make dep_lua a disabler 2025-11-21 21:48:57 +00:00
genxml intel/genxml: Update CS_CHICKEN1 register for gfx20 2025-11-13 23:05:01 +00:00
isl intel/isl: add INTEL_DEBUG=noccs-modifier to disable CCS modifiers 2025-11-13 09:52:27 +00:00
mda intel/mda: Use a vector to track the contents variable 2025-10-30 20:03:24 +00:00
nullhw-layer build: avoid redefining unreachable() which is standard in C23 2025-07-31 17:49:42 +00:00
perf intel/perf: Update perf scripts to get additional performance counters 2025-10-23 16:59:09 +00:00
shaders util/glsl2spirv: Use better glslang flag for -Olib 2025-11-20 02:14:50 +00:00
tools treewide: Replace calling to function ALIGN with align 2025-11-12 21:58:40 +00:00
vulkan anv: remove errors on format queries 2025-11-26 16:06:57 +00:00
vulkan_hasvk vulkan: Optionally share one JSON manifest per driver between architectures 2025-11-24 19:05:57 +00:00
meson.build brw: Move into a new src/intel/compiler/brw subdirectory 2025-10-09 07:01:47 +00:00