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mesa/src/freedreno/ir3
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Kristian H. Kristensen cea39af2fb freedreno/ir3: Generalize ir3_shader_disasm() 
Use a helper function to get the sysval/attribute/varying/output name
and make the disam debug output independent of shader stage.

Reviewed-by: Rob Clark <robdclark@gmail.com>
2019-06-05 11:15:04 -07:00
..
disasm-a3xx.c freedreno/ir3: fix rgetpos decoding 2019-04-25 14:13:31 -07:00
instr-a3xx.h freedreno/ir3 better cat6 encoding detection 2019-03-21 09:13:05 -04:00
ir3.c freedreno/ir3: fixes for half reg in/out 2019-04-30 10:39:24 -07:00
ir3.h freedreno/ir3: convert back to 32-bit values for half constant registers. 2019-06-03 12:44:03 -07:00
ir3_a4xx.c freedreno/ir3: move const_state to ir3_shader 2019-05-07 07:26:00 -07:00
ir3_a6xx.c freedreno/ir3: use nir_src_as_uint in a few places 2019-04-14 22:25:56 +02:00
ir3_compiler.c freedreno/ir3: add IR3_SHADER_DEBUG flag to disable ubo lowering 2019-05-02 11:19:22 -07:00
ir3_compiler.h freedreno/ir3: move ir3_pointer_size() 2019-05-07 07:26:00 -07:00
ir3_compiler_nir.c freedreno/ir3: Add a 16-bit implementation of nir_op_imul 2019-06-03 13:31:51 -07:00
ir3_context.c freedreno/ir3: adjust the bitsize of regs when an array loading. 2019-06-03 12:44:03 -07:00
ir3_context.h freedreno/ir3: adjust the bitsize of regs when an array loading. 2019-06-03 12:44:03 -07:00
ir3_cp.c freedreno/ir3: convert back to 32-bit values for half constant registers. 2019-06-03 12:44:03 -07:00
ir3_depth.c freedreno/ir3: track register pressure in sched 2019-03-03 13:27:50 -05:00
ir3_group.c freedreno: move ir3 to common location 2018-11-27 15:44:02 -05:00
ir3_image.c freedreno: Reuse glsl_get_sampler_coordinate_components(). 2019-06-04 16:44:24 -07:00
ir3_image.h freedreno/ir3: add image/ssbo <-> ibo/tex mapping 2019-02-16 16:27:59 -05:00
ir3_legalize.c freedreno/ir3: set (ss) on last_input if ldlv 2019-05-31 12:58:33 -07:00
ir3_nir.c nir: allow specifying a set of opcodes in lower_alu_to_scalar 2019-05-10 15:10:41 +00:00
ir3_nir.h freedreno/ir3: move const_state to ir3_shader 2019-05-07 07:26:00 -07:00
ir3_nir_analyze_ubo_ranges.c freedreno/ir3: add IR3_SHADER_DEBUG flag to disable ubo lowering 2019-05-02 11:19:22 -07:00
ir3_nir_lower_io_offsets.c nir: make nir_const_value scalar 2019-04-14 22:25:56 +02:00
ir3_nir_lower_load_barycentric_at_offset.c freedreno/ir3: lower load_barycentric_at_offset 2019-04-25 14:13:31 -07:00
ir3_nir_lower_load_barycentric_at_sample.c freedreno/ir3: lower load_barycentric_at_sample 2019-04-25 14:13:31 -07:00
ir3_nir_lower_tg4_to_tex.c freedreno: move ir3 to common location 2018-11-27 15:44:02 -05:00
ir3_nir_move_varying_inputs.c freedreno/ir3: add pass to move varying loads 2019-03-30 12:56:01 -04:00
ir3_nir_trig.py freedreno: Improve the pi approximations in trig lowering. 2019-06-04 23:35:38 +00:00
ir3_print.c freedreno/ir3: add Sethi–Ullman numbering pass 2019-03-03 13:27:50 -05:00
ir3_ra.c freedreno/ir3: Fix up the half reg source even when src instr==NULL 2019-06-03 13:31:51 -07:00
ir3_sched.c freedreno/ir3: immediately schedule meta instructions 2019-06-03 12:44:03 -07:00
ir3_shader.c freedreno/ir3: Generalize ir3_shader_disasm() 2019-06-05 11:15:04 -07:00
ir3_shader.h freedreno/ir3: fix counting and printing for half registers. 2019-06-03 13:31:51 -07:00
ir3_sun.c freedreno/ir3: add Sethi–Ullman numbering pass 2019-03-03 13:27:50 -05:00
meson.build freedreno/ir3: lower load_barycentric_at_offset 2019-04-25 14:13:31 -07:00