Qiang Yu 719366c2b2 ac/llvm,radeonsi: lower nir_load_ring_tess_factors_amd ... No one implement this intrinsic in llvm, so remove the llvm entry too. This will be used in TCS nir tess factor write. Reviewed-by: Marek Olšák <marek.olsak@amd.com> Signed-off-by: Qiang Yu <yuq825@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21437>		2023-03-16 04:33:30 +00:00
..
addrlib	amd: split GFX1103 into GFX1103_R1 and GFX1103_R2	2023-02-03 00:18:01 +00:00
ci	ci: Update trace expectations for GLSL constant prop removal.	2023-03-15 03:29:19 +00:00
common	ac/nir: handle tess factor output missing case	2023-03-16 04:33:30 +00:00
compiler	aco: remove aco::rt_stack variable	2023-03-16 01:40:30 +00:00
drm-shim	r300: use drm_shim_override	2022-11-16 14:37:47 +00:00
llvm	ac/llvm,radeonsi: lower nir_load_ring_tess_factors_amd	2023-03-16 04:33:30 +00:00
registers	amd/registers: only define SPI and COMPUTE registers in the 0xB000 range	2023-02-24 21:27:24 +00:00
vulkan	radv/rt: use prolog for raytracing shaders	2023-03-16 01:40:30 +00:00
.clang-format	radv: Add nir_foreach_variable_with_modes to .clang-format	2022-12-09 07:07:10 +00:00
meson.build	meson: build radeon drm-shim also for r300 and r600	2022-11-16 14:37:47 +00:00