Samuel Pitoiset cc5b6a0e89 radv: enable TC-compat HTILE with D32S8 and MSAA on GFX9+ ... Only GFX8 has some depth/stencil resolve failures. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8562>		2021-01-19 18:16:35 +00:00
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addrlib	amd/addrlib: use cpp.has_argument() to filter compiler arguments	2021-01-05 11:29:11 +00:00
common	ac/surface: Fix GFX9 sparse mip info.	2021-01-16 14:09:18 +00:00
compiler	aco: add test for incorrect convert_to_SDWA() check	2021-01-19 15:38:56 +00:00
llvm	ac/nir: implement sparse image/texture loads	2021-01-08 14:27:07 +00:00
registers	amd/registers: add missing VRS registers	2020-12-14 16:22:38 +00:00
vulkan	radv: enable TC-compat HTILE with D32S8 and MSAA on GFX9+	2021-01-19 18:16:35 +00:00
Android.addrlib.mk	android: amd/addrlib: add gfx10 support	2019-07-10 09:03:55 +02:00
Android.common.mk	android: amd/registers: switch to new generated register definitions	2020-09-06 20:20:34 +02:00
Android.compiler.mk	android: aco/isel: Move context initialization code to a dedicated file	2020-09-14 21:26:53 +02:00
Android.mk	android: aco: add support for libmesa_aco	2019-09-28 15:56:34 +02:00
Makefile.sources	android: ac/radv: fix typo in ac_rgp.h listed in Makefile.sources	2021-01-09 11:15:09 +01:00
meson.build	aco: add framework for unit testing	2020-07-30 16:13:08 +00:00