fdo-mirrors/mesa
1
0
Fork 0
mirror of https://gitlab.freedesktop.org/mesa/mesa.git synced 2026-04-21 01:10:44 +02:00
Code Issues Projects Releases Packages Wiki Activity Actions 1

amd/registers: add missing VRS registers

Browse source 
These register definitions are copied from AMDVLK because they
aren't even in the kernel.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7837>
This commit is contained in:
Samuel Pitoiset 2020-11-23 17:59:10 +01:00 • committed by Marge Bot
parent c4217ef2fc
commit 9770ffb07c
1 changed files with 14 additions and 1 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

15
src/amd/registers/gfx103.json
View file

@ -8218,6 +8218,12 @@
"name": "GE_USER_VGPR_EN",
"type_ref": "GE_USER_VGPR_EN"
},
{
"chips": ["gfx103"],
"map": {"at": 199052, "to": "mm"},
"name": "GE_VRS_RATE",
"type_ref": "GE_VRS_RATE"
},
{
"chips": ["gfx103"],
"map": {"at": 199168, "to": "mm"},
@ -14484,6 +14490,12 @@
{"bits": [2, 2], "name": "EN_USER_VGPR3"}
]
},
"GE_VRS_RATE": {
"fields": [
{"bits": [0, 1], "name": "RATE_X"},
{"bits": [4, 5], "name": "RATE_Y"}
]
},
"GRBM_GFX_INDEX": {
"fields": [
{"bits": [0, 7], "name": "INSTANCE_INDEX"},
@ -16525,7 +16537,8 @@
"fields": [
{"bits": [1, 1], "name": "EN_REG_RT_INDEX"},
{"bits": [3, 3], "name": "EN_PRIM_PAYLOAD"},
{"bits": [4, 4], "name": "EN_DRAW_VP"}
{"bits": [4, 4], "name": "EN_DRAW_VP"},
{"bits": [6, 6], "name": "EN_VRS_RATE"}
]
},
"VGT_ENHANCE": {