mesa/src/broadcom
Iago Toral Quiroga cb83f25b39 broadcom/compiler: don't assign payload registers to spilling setup temps
We read our payload registers first in the shader so we generally don't have
to care about temps being allocated to them and stomping their value before
we can read them. Hoewer, spilling setup instructions are an exception since
these will be inserted first when there is any spilling in the program.
To fix this, we flag RA nodes involved with these instructions so we can
then try to avoid assiging these registers to them.

Fixes CTS failures with V3D_DEBUG=opt_compile_time, particularly:
dEQP-VK.binding_model.buffer_device_address.set0.depth2.basessbo.convertcheckuv2.nostore.single.std140.comp_offset_nonzero

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29343>
2024-05-24 05:25:22 +00:00
..
ci v3dv/ci: Add more dEQP-VK subgroups that are currently skipped 2024-05-23 11:55:26 +02:00
cle broadcom/cle: fix up shader record for V3D 7.1.10 / 2712D0 2024-05-15 13:57:10 +00:00
clif broadcom: only support v42 and v71 2023-11-02 11:59:08 +01:00
common v3dv: V3D_CL_MAX_INSTR_SIZE bytes in last CL instruction not needed 2024-05-22 18:44:14 +00:00
compiler broadcom/compiler: don't assign payload registers to spilling setup temps 2024-05-24 05:25:22 +00:00
drm-shim broadcom/compiler: remove include of gallium headers from meson.build 2023-12-12 10:03:11 +00:00
qpu broadcom/compiler: add new SFU instructions in V3D 7.x 2024-01-31 10:06:06 +00:00
simulator broadcom/simulator: Add DRM_IOCTL_V3D_GET_COUNTER to simulator 2024-05-22 05:37:48 +00:00
vulkan v3dv: V3D_CL_MAX_INSTR_SIZE bytes in last CL instruction not needed 2024-05-22 18:44:14 +00:00
.editorconfig
meson.build broadcom/common: Now "util/box.h" is under src, so remove the FIXME 2024-04-22 15:01:34 +00:00