mesa/src/intel
José Roberto de Souza 1067ec90a5 anv: Update PIPELINE_CONTROL flush when switching pipeline mode in TGL+
This 2 PIPELINE_CONTROL flushes are not necessary for TGL and newer
and also it have different requirements of flush, so here doing
this two changes at the same time.

As no ANV_PIPE_INVALIDATE_BITS is set as parameter of
anv_add_pending_pipe_bits(),
genX(cmd_buffer_apply_pipe_flushes)(cmd_buffer) will only emit one
PIPELINE_CONTROL.

BSpec: 44505
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20501>
2023-01-09 14:40:26 +00:00
..
blorp intel/blorp: Fix a hang caused by invalid dispatch enables on gfx7 2022-12-23 10:17:04 +00:00
ci ci/iris: Add some recent flakes. 2023-01-04 21:18:08 +00:00
common intel/common: Move i915 gem specific code to its own file 2022-12-23 18:22:29 +00:00
compiler intel/fs: only avoid SIMD32 if strictly inferior in throughput 2023-01-09 08:41:47 +00:00
dev intel/dev: setup 1024 GS urb entries for ADL-N 2022-12-23 09:51:01 +00:00
ds intel/ds: add missing generate draws perfetto glue 2022-12-26 14:11:44 +02:00
genxml intel/genxml/gen12.5: Pipe_Control::Remove Global Snapshot Count Reset 2022-12-29 08:34:25 -08:00
isl intel/isl: Disable CCS on MTL until B0 (Wa_14017353530) 2022-12-15 11:43:00 -08:00
nullhw-layer utils: Merge util/debug.* into util/u_debug.* and remove util/debug.* 2022-11-02 07:25:39 +00:00
perf intel: add MTL performance metrics 2022-12-09 09:13:02 +00:00
tools anv,hasvk: migrate align32 to the right functions from util 2023-01-06 17:22:16 +00:00
vulkan anv: Update PIPELINE_CONTROL flush when switching pipeline mode in TGL+ 2023-01-09 14:40:26 +00:00
vulkan_hasvk anv,hasvk: move the null check into the function call and drop null check copies 2023-01-06 17:22:16 +00:00
meson.build intel: Disable SSE2 instruction set if building for non x86 architectures 2022-11-23 16:57:23 +00:00