mesa/src/intel
Jordan Justen f446f7a769 intel/l3: Use L3 full-way allocation setting for gfx12.5 (DG2, MTL)
For now we use an empty set of L3 config settings on DG2 & MTL, which
will cause the L3 programming to set L3FullWayAllocationEnable.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18770>
2022-09-23 12:49:37 -07:00
..
blorp blorp: defined operations for debug purposes 2022-09-21 12:38:34 +00:00
ci ci/intel: drop glmark2 terrain trace 2022-09-18 18:51:14 +00:00
common intel/l3: Use L3 full-way allocation setting for gfx12.5 (DG2, MTL) 2022-09-23 12:49:37 -07:00
compiler intel/nir/rt: fixup alignment of memcpy iterations 2022-09-23 08:29:17 +00:00
dev intel/dev: Adjust prefetch_size values for MTL engines 2022-09-22 02:14:47 +00:00
ds intel/utrace: create the callback events for xfb trace points 2022-09-22 06:59:06 +00:00
genxml intel/genxml: add VFG_PREEMPTION_CHICKEN_BITS register 2022-09-14 10:01:23 +00:00
isl intel/utrace: make blorp tracepoints more readable 2022-09-21 12:38:34 +00:00
nullhw-layer intel/nullhw: Use correct macro to fix build regression 2022-08-01 10:54:38 +00:00
perf intel: fix typos found by codespell 2022-06-27 10:20:55 +00:00
tools intel/tools: Also look for 'batch' tag 2022-08-17 02:24:09 +00:00
vulkan anv: implement Wa_14016118574 2022-09-23 12:27:05 +00:00
vulkan_hasvk intel/dev: Adjust prefetch_size values for MTL engines 2022-09-22 02:14:47 +00:00
meson.build intel: add a hasvk vulkan driver 2022-09-02 09:40:45 +00:00