Rhys Perry 2704a30df0 radv: perform nir_opt_access before the first radv_optimize_nir ... Two lowered loads might not be CSE'd after nir_lower_explicit_io if one of them is shrinked. This doesn't happen for deref loads, but it needs the CAN_REORDER flag first. fossil-db (gfx1201): Totals from 556 (0.70% of 79377) affected shaders: MaxWaves: 14936 -> 14940 (+0.03%); split: +0.05%, -0.03% Instrs: 2140334 -> 2140942 (+0.03%); split: -0.07%, +0.10% CodeSize: 11137948 -> 11145416 (+0.07%); split: -0.07%, +0.13% SpillSGPRs: 2385 -> 2527 (+5.95%); split: -0.34%, +6.29% Latency: 12310570 -> 12305011 (-0.05%); split: -0.08%, +0.04% InvThroughput: 2136142 -> 2135516 (-0.03%); split: -0.06%, +0.03% VClause: 47419 -> 47420 (+0.00%); split: -0.01%, +0.01% SClause: 58423 -> 58290 (-0.23%); split: -0.36%, +0.14% Copies: 160626 -> 161321 (+0.43%); split: -0.25%, +0.68% Branches: 69693 -> 69710 (+0.02%); split: -0.04%, +0.06% PreSGPRs: 34824 -> 34945 (+0.35%); split: -0.24%, +0.58% PreVGPRs: 28682 -> 28649 (-0.12%); split: -0.36%, +0.24% VALU: 1080800 -> 1081171 (+0.03%); split: -0.04%, +0.08% SALU: 353112 -> 353770 (+0.19%); split: -0.15%, +0.34% SMEM: 81587 -> 81364 (-0.27%) Signed-off-by: Rhys Perry <pendingchaos02@gmail.com> Reviewed-by: Georg Lehmann <dadschoorse@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34162>		2025-05-08 13:30:50 +00:00
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addrlib	amd/addrlib: remove the DCC page fault workaround	2025-04-01 03:23:22 -04:00
ci	radv/ci: rename .test-radv to .ci-tron-test-radv	2025-05-07 21:02:16 +00:00
common	ac/nir: allow 8/16-bit smem loads	2025-05-08 13:30:50 +00:00
compiler	aco: don't check dst_bitsize in apply_load_extract	2025-05-08 13:30:50 +00:00
drm-shim	amd/drm-shim: add gfx1201	2025-03-10 11:21:36 +00:00
gmlib	amd/gmlib: add gmlib for radeonsi	2025-02-27 03:15:16 +00:00
llvm	ac/llvm: use mul24 intrinsics	2025-04-23 01:11:48 +00:00
registers	amd: Rename GFX1103_R1/R2 to PHOENIX/2	2024-11-20 02:14:40 +00:00
vpelib	amd/vpelib: More parameters to the segmentation process and introduce validation hook	2025-03-06 02:11:53 +00:00
vulkan	radv: perform nir_opt_access before the first radv_optimize_nir	2025-05-08 13:30:50 +00:00
meson.build	amd/gmlib: add gmlib for radeonsi	2025-02-27 03:15:16 +00:00