Danylo Piliaiev c538a9ec6e tu: Use EARLY_Z also for stencil tests ... EARLY tests can test and write out stencil values. Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33851>		2025-04-02 12:03:30 +00:00
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.gitlab-ci	freedreno/regs: Rename BINNING bit to FS_DISABLE in a few regs	2025-03-31 12:15:56 +02:00
afuc	freedreno: Misc control registers updates	2025-03-14 16:52:06 +00:00
ci	Uprev ANGLE to 1b34d2a18af12cc55a3bc74dd679c2937d10cc5c	2025-04-01 12:51:06 +00:00
common	freedreno/crashdec: Fix and extend control reg dumping on a750	2025-03-14 16:52:06 +00:00
computerator	ir3: split immediate state from rest of const state	2025-03-06 08:47:54 +00:00
decode	freedreno/crashdec: Dump CP_BV_SQE_UCODE_DBG	2025-03-14 16:52:06 +00:00
drm	virtio: Remove virglrenderer_hw.h entirely	2025-04-01 22:11:10 +00:00
drm-shim	freedreno/drm-shim: enable raytracing	2025-01-31 20:19:24 +00:00
ds	freedreno/pps: Fix multiple counter collection runs	2025-01-21 18:23:52 +00:00
fdl	freedreno/fdl: Log mutability when dumping layout	2025-02-17 17:56:17 +00:00
ir2	freedreno: use unicode © instead of DOS-like (C) copyright sign	2024-08-28 08:54:00 +00:00
ir3	ir3: Detect FS that write only color without other side effects	2025-03-31 12:15:56 +02:00
isa	ir3/isa: fix (dis)asm of ldg.a/stg.a on a6xx	2025-02-13 08:01:58 +00:00
perfcntrs	freedreno: add common implementation of perfcntr-based derived counters	2025-03-03 11:38:28 +00:00
registers	tu/lrz: Improve LRZ around stencil tests and reads_dest cases	2025-04-02 12:03:30 +00:00
rnn	freedreno/rnndec: Consider array length when finding by reg name	2024-10-15 15:35:39 +00:00
vulkan	tu: Use EARLY_Z also for stencil tests	2025-04-02 12:03:30 +00:00
.clang-format	freedreno: add missing entries to ForEachMacros	2025-01-24 12:15:31 +00:00
.dir-locals.el
.editorconfig
meson.build	meson: Update Lua dependency version to 5.3	2024-08-14 03:03:46 +00:00