mesa/src/intel
Lionel Landwerlin c4fac8fbbe anv: rework sample location
On Gfx7 we can only give the sample location for a given multisample
number. This means everytime the multisampling value changes, we have
to re-emit the locations. It's fine because it's also where
(3DSTATE_MULTISAMPLE) the number of samples is stored.

On Gfx8+ though, 3DSTATE_MULTISAMPLE only holds the number of samples
and all the sample locations for all number of samples are located in
3DSTATE_SAMPLE_PATTERN. So to be more effecient there, we need to
track the locations for all sample numbers and compare new values with
the relevant sample count when touching the dynamic state.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16220>
(cherry picked from commit 168b13364f)
2022-05-04 16:04:51 -07:00
..
blorp blorp: disable depth bounds 2022-04-06 19:00:50 +00:00
ci blorp: disable depth bounds 2022-04-06 19:00:50 +00:00
common intel: fix URB programming for GT1s 2022-04-20 21:44:49 -07:00
compiler intel/compiler: invalidate metadata in brw_nir_initialize_mue 2022-04-20 21:44:50 -07:00
dev intel_dev_info: Add --hwconfig command line parameter 2022-05-02 11:35:31 -07:00
ds intel/ds: fix compilation with perfetto 2022-02-08 12:29:21 +00:00
genxml intel/genxml: Add SAMPLER_MODE bits for enabling Small PL on Icelake 2022-04-11 19:17:07 +00:00
isl isl,iris: Add DG2 CCS modifier support for XeHP 2022-05-02 10:46:33 -07:00
nullhw-layer intel/nullhw: fix build 2021-03-26 20:12:40 +00:00
perf intel/perf: Fix OA report accumulation on Gfx12+. 2022-04-12 00:11:47 +00:00
tools intel: remove chipset_id 2022-01-13 03:09:36 +00:00
vulkan anv: rework sample location 2022-05-04 16:04:51 -07:00
Makefile.perf.am intel: Rename GEN_PERF prefix to INTEL_PERF in build files 2021-04-20 20:06:34 +00:00
meson.build anv: add perfetto source 2022-01-14 20:17:44 +00:00