Job Noorman 0223ab01b7 ir3/isa: add encoding for scalar predicates ... Predicate registers can be written from the scalar ALU by using a special cat2 encoding: if the dst is encoded as a0.c, the instruction will execute on the scalar ALU and write to p0.c. This commit follows the blob and disassembles scalar predicates as up0.c. The "u" presumably stands for "uniform". Signed-off-by: Job Noorman <jnoorman@igalia.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36614>		2025-08-20 06:14:02 +00:00
..
encode.c	ir3/isa: add encoding for scalar predicates	2025-08-20 06:14:02 +00:00
ir3-cat0.xml	ir3: model predt/predf without sources	2024-04-23 19:18:29 +00:00
ir3-cat1.xml	ir3/isa: add isaspec definition for movs	2025-06-26 10:22:09 +00:00
ir3-cat2.xml	ir3/isa: add encoding for scalar predicates	2025-08-20 06:14:02 +00:00
ir3-cat3.xml	ir3: fix display of dot-product instructions	2025-05-08 09:44:31 +00:00
ir3-cat4.xml
ir3-cat5.xml	ir3: add encoding for isam.v	2024-06-14 17:12:59 +00:00
ir3-cat6.xml	freedreno: Rename IBO -> UAV	2025-06-27 23:08:31 +00:00
ir3-cat7.xml	ir3/isa: ignore bit 54 in alias encoding	2025-07-01 14:07:59 +00:00
ir3-common.xml	ir3/isa: allow rpt6/rpt7	2024-11-28 13:08:36 +00:00
ir3-disasm.c	freedreno: Convert to SPDX-License-Identifier instead of pasting whole license	2024-08-28 08:54:00 +00:00
ir3.xml	ir3: Support assembling/disassembling ray_intersection and resbase	2025-01-20 01:22:23 +00:00
isa.h	freedreno: Convert to SPDX-License-Identifier instead of pasting whole license	2024-08-28 08:54:00 +00:00
meson.build	build: pass licensing information in SPDX form	2024-06-29 12:42:49 -07:00